Module: Mesa Branch: main Commit: 4d44cea3e0423e09049a7fb8574b2702363d4480 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d44cea3e0423e09049a7fb8574b2702363d4480
Author: Samuel Pitoiset <[email protected]> Date: Tue Jan 9 09:41:05 2024 +0100 radv: introduce radv_device_cache_key for per-device cache compiler options This replaces RADV_HASH_SHADER_xxx by radv_device_cache_key which is a new struct that contains per-device compiler options. More options will be moved there. Blake3 is used to replace sha1. Signed-off-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26948> --- src/amd/vulkan/radv_device.c | 25 ++++++++++++++++++ src/amd/vulkan/radv_pipeline.c | 45 --------------------------------- src/amd/vulkan/radv_pipeline_cache.c | 13 +++++----- src/amd/vulkan/radv_pipeline_compute.c | 2 +- src/amd/vulkan/radv_pipeline_graphics.c | 3 +-- src/amd/vulkan/radv_pipeline_rt.c | 4 +-- src/amd/vulkan/radv_private.h | 31 ++++++++++++++++++----- 7 files changed, 60 insertions(+), 63 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index f7d9634743c..d6d03057f03 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -705,6 +705,27 @@ capture_trace(VkQueue _queue) return result; } +static void +radv_device_init_cache_key(struct radv_device *device) +{ + struct radv_device_cache_key *key = &device->cache_key; + + key->clear_lds = device->instance->drirc.clear_lds; + key->cs_wave32 = device->physical_device->cs_wave_size == 32; + key->dual_color_blend_by_location = device->instance->drirc.dual_color_blend_by_location; + key->emulate_rt = !!(device->instance->perftest_flags & RADV_PERFTEST_EMULATE_RT); + key->ge_wave32 = device->physical_device->ge_wave_size == 32; + key->no_fmask = !!(device->instance->debug_flags & RADV_DEBUG_NO_FMASK); + key->no_rt = !!(device->instance->debug_flags & RADV_DEBUG_NO_RT); + key->ps_wave32 = device->physical_device->ps_wave_size == 32; + key->rt_wave64 = device->physical_device->rt_wave_size == 64; + key->split_fma = !!(device->instance->debug_flags & RADV_DEBUG_SPLIT_FMA); + key->use_llvm = device->physical_device->use_llvm; + key->use_ngg_culling = device->physical_device->use_ngg_culling; + + _mesa_blake3_compute(key, sizeof(*key), device->cache_hash); +} + VKAPI_ATTR VkResult VKAPI_CALL radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCreateInfo, const VkAllocationCallbacks *pAllocator, VkDevice *pDevice) @@ -1125,6 +1146,10 @@ radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCr device->load_grid_size_from_user_sgpr = device->physical_device->rad_info.gfx_level >= GFX10_3; device->keep_shader_info = keep_shader_info; + + /* Initialize the per-device cache key before compiling meta shaders. */ + radv_device_init_cache_key(device); + result = radv_device_init_meta(device); if (result != VK_SUCCESS) goto fail; diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index fbc00cd069e..cb7ab869fe6 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -229,51 +229,6 @@ radv_generate_pipeline_key(const struct radv_device *device, const VkPipelineSha return key; } -#define RADV_HASH_SHADER_CS_WAVE32 (1 << 1) -#define RADV_HASH_SHADER_PS_WAVE32 (1 << 2) -#define RADV_HASH_SHADER_GE_WAVE32 (1 << 3) -#define RADV_HASH_SHADER_LLVM (1 << 4) -#define RADV_HASH_SHADER_CLEAR_LDS (1 << 5) -#define RADV_HASH_SHADER_USE_NGG_CULLING (1 << 13) -#define RADV_HASH_SHADER_EMULATE_RT (1 << 16) -#define RADV_HASH_SHADER_SPLIT_FMA (1 << 17) -#define RADV_HASH_SHADER_RT_WAVE64 (1 << 18) -#define RADV_HASH_SHADER_NO_FMASK (1 << 19) -#define RADV_HASH_SHADER_NO_RT (1 << 20) -#define RADV_HASH_SHADER_DUAL_BLEND_MRT1 (1 << 21) - -uint32_t -radv_get_hash_flags(const struct radv_device *device) -{ - uint32_t hash_flags = 0; - - if (device->physical_device->use_ngg_culling) - hash_flags |= RADV_HASH_SHADER_USE_NGG_CULLING; - if (device->instance->perftest_flags & RADV_PERFTEST_EMULATE_RT) - hash_flags |= RADV_HASH_SHADER_EMULATE_RT; - if (device->physical_device->rt_wave_size == 64) - hash_flags |= RADV_HASH_SHADER_RT_WAVE64; - if (device->physical_device->cs_wave_size == 32) - hash_flags |= RADV_HASH_SHADER_CS_WAVE32; - if (device->physical_device->ps_wave_size == 32) - hash_flags |= RADV_HASH_SHADER_PS_WAVE32; - if (device->physical_device->ge_wave_size == 32) - hash_flags |= RADV_HASH_SHADER_GE_WAVE32; - if (device->physical_device->use_llvm) - hash_flags |= RADV_HASH_SHADER_LLVM; - if (device->instance->debug_flags & RADV_DEBUG_SPLIT_FMA) - hash_flags |= RADV_HASH_SHADER_SPLIT_FMA; - if (device->instance->debug_flags & RADV_DEBUG_NO_FMASK) - hash_flags |= RADV_HASH_SHADER_NO_FMASK; - if (device->instance->debug_flags & RADV_DEBUG_NO_RT) - hash_flags |= RADV_HASH_SHADER_NO_RT; - if (device->instance->drirc.dual_color_blend_by_location) - hash_flags |= RADV_HASH_SHADER_DUAL_BLEND_MRT1; - if (device->instance->drirc.clear_lds) - hash_flags |= RADV_HASH_SHADER_CLEAR_LDS; - return hash_flags; -} - void radv_pipeline_stage_init(const VkPipelineShaderStageCreateInfo *sinfo, const struct radv_pipeline_layout *pipeline_layout, struct radv_shader_stage *out_stage) diff --git a/src/amd/vulkan/radv_pipeline_cache.c b/src/amd/vulkan/radv_pipeline_cache.c index 5241ff01689..fc357ad9058 100644 --- a/src/amd/vulkan/radv_pipeline_cache.c +++ b/src/amd/vulkan/radv_pipeline_cache.c @@ -46,12 +46,13 @@ radv_is_cache_disabled(struct radv_device *device) } void -radv_hash_shaders(unsigned char *hash, const struct radv_shader_stage *stages, uint32_t stage_count, - const struct radv_pipeline_layout *layout, const struct radv_pipeline_key *key, uint32_t flags) +radv_hash_shaders(const struct radv_device *device, unsigned char *hash, const struct radv_shader_stage *stages, + uint32_t stage_count, const struct radv_pipeline_layout *layout, const struct radv_pipeline_key *key) { struct mesa_sha1 ctx; _mesa_sha1_init(&ctx); + _mesa_sha1_update(&ctx, device->cache_hash, sizeof(device->cache_hash)); if (key) _mesa_sha1_update(&ctx, key, sizeof(*key)); if (layout) @@ -63,7 +64,6 @@ radv_hash_shaders(unsigned char *hash, const struct radv_shader_stage *stages, u _mesa_sha1_update(&ctx, stages[s].shader_sha1, sizeof(stages[s].shader_sha1)); } - _mesa_sha1_update(&ctx, &flags, sizeof(flags)); _mesa_sha1_final(&ctx, hash); } @@ -78,13 +78,15 @@ radv_hash_rt_stages(struct mesa_sha1 *ctx, const VkPipelineShaderStageCreateInfo } void -radv_hash_rt_shaders(unsigned char *hash, const VkRayTracingPipelineCreateInfoKHR *pCreateInfo, - const struct radv_pipeline_key *key, const struct radv_ray_tracing_group *groups, uint32_t flags) +radv_hash_rt_shaders(const struct radv_device *device, unsigned char *hash, + const VkRayTracingPipelineCreateInfoKHR *pCreateInfo, const struct radv_pipeline_key *key, + const struct radv_ray_tracing_group *groups) { RADV_FROM_HANDLE(radv_pipeline_layout, layout, pCreateInfo->layout); struct mesa_sha1 ctx; _mesa_sha1_init(&ctx); + _mesa_sha1_update(&ctx, device->cache_hash, sizeof(device->cache_hash)); if (layout) _mesa_sha1_update(&ctx, layout->sha1, sizeof(layout->sha1)); @@ -120,7 +122,6 @@ radv_hash_rt_shaders(unsigned char *hash, const VkRayTracingPipelineCreateInfoKH VK_PIPELINE_CREATE_2_RAY_TRACING_NO_NULL_INTERSECTION_SHADERS_BIT_KHR | VK_PIPELINE_CREATE_2_LIBRARY_BIT_KHR); _mesa_sha1_update(&ctx, &pipeline_flags, sizeof(pipeline_flags)); - _mesa_sha1_update(&ctx, &flags, sizeof(flags)); _mesa_sha1_final(&ctx, hash); } diff --git a/src/amd/vulkan/radv_pipeline_compute.c b/src/amd/vulkan/radv_pipeline_compute.c index 27759fa645b..e4ab79c48c7 100644 --- a/src/amd/vulkan/radv_pipeline_compute.c +++ b/src/amd/vulkan/radv_pipeline_compute.c @@ -204,7 +204,7 @@ radv_compute_pipeline_compile(struct radv_compute_pipeline *pipeline, struct rad radv_pipeline_stage_init(pStage, pipeline_layout, &cs_stage); - radv_hash_shaders(hash, &cs_stage, 1, pipeline_layout, pipeline_key, radv_get_hash_flags(device)); + radv_hash_shaders(device, hash, &cs_stage, 1, pipeline_layout, pipeline_key); pipeline->base.pipeline_hash = *(uint64_t *)hash; diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index 726f77c4dbf..33a933e8ff9 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -2646,8 +2646,7 @@ radv_graphics_pipeline_compile(struct radv_graphics_pipeline *pipeline, const Vk radv_pipeline_load_retained_shaders(device, pipeline, pCreateInfo, stages); if (radv_should_compute_pipeline_hash(device, pipeline, fast_linking_enabled)) { - radv_hash_shaders(hash, stages, MESA_VULKAN_SHADER_STAGES, pipeline_layout, pipeline_key, - radv_get_hash_flags(device)); + radv_hash_shaders(device, hash, stages, MESA_VULKAN_SHADER_STAGES, pipeline_layout, pipeline_key); pipeline->base.pipeline_hash = *(uint64_t *)hash; } diff --git a/src/amd/vulkan/radv_pipeline_rt.c b/src/amd/vulkan/radv_pipeline_rt.c index eb573da0a9c..171d6f33abf 100644 --- a/src/amd/vulkan/radv_pipeline_rt.c +++ b/src/amd/vulkan/radv_pipeline_rt.c @@ -287,7 +287,7 @@ radv_init_rt_stage_hashes(struct radv_device *device, const VkRayTracingPipeline struct radv_shader_stage stage; radv_pipeline_stage_init(&pCreateInfo->pStages[idx], pipeline_layout, &stage); - radv_hash_shaders(stages[idx].sha1, &stage, 1, NULL, key, radv_get_hash_flags(device)); + radv_hash_shaders(device, stages[idx].sha1, &stage, 1, NULL, key); } } @@ -785,7 +785,7 @@ radv_rt_pipeline_create(VkDevice _device, VkPipelineCache _cache, const VkRayTra bool keep_executable_info = radv_pipeline_capture_shaders(device, pipeline->base.base.create_flags); - radv_hash_rt_shaders(pipeline->sha1, pCreateInfo, &key, pipeline->groups, radv_get_hash_flags(device)); + radv_hash_rt_shaders(device, pipeline->sha1, pCreateInfo, &key, pipeline->groups); pipeline->base.base.pipeline_hash = *(uint64_t *)pipeline->sha1; bool cache_hit = false; diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 8106245403c..72a786c25cd 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -877,6 +877,21 @@ struct radv_sqtt_timestamp { struct list_head list; }; +struct radv_device_cache_key { + uint32_t clear_lds : 1; + uint32_t cs_wave32 : 1; + uint32_t dual_color_blend_by_location : 1; + uint32_t emulate_rt : 1; + uint32_t ge_wave32 : 1; + uint32_t no_fmask : 1; + uint32_t no_rt : 1; + uint32_t ps_wave32 : 1; + uint32_t rt_wave64 : 1; + uint32_t split_fma : 1; + uint32_t use_llvm : 1; + uint32_t use_ngg_culling : 1; +}; + struct radv_device { struct vk_device vk; @@ -1062,6 +1077,9 @@ struct radv_device { struct hash_table *rt_handles; simple_mtx_t rt_handles_mtx; + + struct radv_device_cache_key cache_key; + blake3_hash cache_hash; }; bool radv_device_set_pstate(struct radv_device *device, bool enable); @@ -1981,16 +1999,15 @@ struct radv_ray_tracing_group; void radv_pipeline_stage_init(const VkPipelineShaderStageCreateInfo *sinfo, const struct radv_pipeline_layout *layout, struct radv_shader_stage *out_stage); -void radv_hash_shaders(unsigned char *hash, const struct radv_shader_stage *stages, uint32_t stage_count, - const struct radv_pipeline_layout *layout, const struct radv_pipeline_key *key, uint32_t flags); +void radv_hash_shaders(const struct radv_device *device, unsigned char *hash, const struct radv_shader_stage *stages, + uint32_t stage_count, const struct radv_pipeline_layout *layout, + const struct radv_pipeline_key *key); void radv_hash_rt_stages(struct mesa_sha1 *ctx, const VkPipelineShaderStageCreateInfo *stages, unsigned stage_count); -void radv_hash_rt_shaders(unsigned char *hash, const VkRayTracingPipelineCreateInfoKHR *pCreateInfo, - const struct radv_pipeline_key *key, const struct radv_ray_tracing_group *groups, - uint32_t flags); - -uint32_t radv_get_hash_flags(const struct radv_device *device); +void radv_hash_rt_shaders(const struct radv_device *device, unsigned char *hash, + const VkRayTracingPipelineCreateInfoKHR *pCreateInfo, const struct radv_pipeline_key *key, + const struct radv_ray_tracing_group *groups); bool radv_enable_rt(const struct radv_physical_device *pdevice, bool rt_pipelines);
