Module: Mesa Branch: main Commit: 57efe44f43f6ec4672a0fb9035cb887de7048f42 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=57efe44f43f6ec4672a0fb9035cb887de7048f42
Author: Samuel Pitoiset <[email protected]> Date: Thu Dec 14 16:12:58 2023 +0100 radv: add missing HTILE support for fb mip tail workaround PAL also applies to depth/stencil images with HTILE. Signed-off-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26589> --- src/amd/vulkan/radv_cmd_buffer.c | 16 ++++++++++++++++ src/amd/vulkan/radv_private.h | 1 + 2 files changed, 17 insertions(+) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 5532b7c3121..b424a30b53a 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -3459,6 +3459,17 @@ radv_emit_fb_mip_change_flush(struct radv_cmd_buffer *cmd_buffer) if (color_mip_changed) { cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | RADV_CMD_FLAG_FLUSH_AND_INV_CB_META; } + + const struct radv_image_view *iview = render->ds_att.iview; + if (iview) { + if ((radv_htile_enabled(iview->image, iview->vk.base_mip_level) || + radv_htile_enabled(iview->image, cmd_buffer->state.ds_mip)) && + cmd_buffer->state.ds_mip != iview->vk.base_mip_level) { + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB | RADV_CMD_FLAG_FLUSH_AND_INV_DB_META; + } + + cmd_buffer->state.ds_mip = iview->vk.base_mip_level; + } } /* This function does the flushes for mip changes if the levels are not zero for @@ -3484,7 +3495,12 @@ radv_emit_mip_change_flush_default(struct radv_cmd_buffer *cmd_buffer) cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | RADV_CMD_FLAG_FLUSH_AND_INV_CB_META; } + if (cmd_buffer->state.ds_mip) { + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB | RADV_CMD_FLAG_FLUSH_AND_INV_DB_META; + } + memset(cmd_buffer->state.cb_mip, 0, sizeof(cmd_buffer->state.cb_mip)); + cmd_buffer->state.ds_mip = 0; } static void diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 5f9b9a012a4..ac87ea7204e 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1691,6 +1691,7 @@ struct radv_cmd_state { bool mesh_shading; uint8_t cb_mip[MAX_RTS]; + uint8_t ds_mip; /* Whether DRAW_{INDEX}_INDIRECT_{MULTI} is emitted. */ bool uses_draw_indirect;
