Module: Mesa Branch: main Commit: b42fae61bb70f6a5e20df290470bb75c8315713f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b42fae61bb70f6a5e20df290470bb75c8315713f
Author: Faith Ekstrand <[email protected]> Date: Fri Dec 15 17:37:38 2023 -0600 nvk: Support extendedDynamicState3ColorWriteMask Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24872> --- src/nouveau/vulkan/nvk_cmd_draw.c | 10 ++++++++-- src/nouveau/vulkan/nvk_graphics_pipeline.c | 8 -------- src/nouveau/vulkan/nvk_physical_device.c | 2 +- 3 files changed, 9 insertions(+), 11 deletions(-) diff --git a/src/nouveau/vulkan/nvk_cmd_draw.c b/src/nouveau/vulkan/nvk_cmd_draw.c index ce15fa824f6..518b89e91dd 100644 --- a/src/nouveau/vulkan/nvk_cmd_draw.c +++ b/src/nouveau/vulkan/nvk_cmd_draw.c @@ -448,6 +448,7 @@ nvk_cmd_buffer_dirty_render_pass(struct nvk_cmd_buffer *cmd) BITSET_SET(dyn->dirty, MESA_VK_DYNAMIC_CB_COLOR_WRITE_ENABLES); BITSET_SET(dyn->dirty, MESA_VK_DYNAMIC_CB_BLEND_ENABLES); BITSET_SET(dyn->dirty, MESA_VK_DYNAMIC_CB_BLEND_EQUATIONS); + BITSET_SET(dyn->dirty, MESA_VK_DYNAMIC_CB_WRITE_MASKS); /* These depend on the depth/stencil format */ BITSET_SET(dyn->dirty, MESA_VK_DYNAMIC_DS_DEPTH_TEST_ENABLE); @@ -1694,15 +1695,20 @@ nvk_flush_cb_state(struct nvk_cmd_buffer *cmd) } } - if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_COLOR_WRITE_ENABLES)) { + if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_WRITE_MASKS) || + BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_COLOR_WRITE_ENABLES)) { uint32_t color_write_enables = 0x0; for (uint8_t a = 0; a < render->color_att_count; a++) { if (dyn->cb.color_write_enables & BITFIELD_BIT(a)) color_write_enables |= 0xf << (4 * a); } + uint32_t att_write_mask = 0x0; + for (uint8_t a = 0; a < render->color_att_count; a++) + att_write_mask |= dyn->cb.attachments[a].write_mask << (a * 4); + P_IMMD(p, NV9097, SET_MME_SHADOW_SCRATCH(NVK_MME_SCRATCH_WRITE_MASK_DYN), - color_write_enables); + color_write_enables & att_write_mask); P_1INC(p, NV9097, CALL_MME_MACRO(NVK_MME_SET_WRITE_MASK)); P_INLINE_DATA(p, render->color_att_count); diff --git a/src/nouveau/vulkan/nvk_graphics_pipeline.c b/src/nouveau/vulkan/nvk_graphics_pipeline.c index b08ee4a1a3d..f28f2cedb81 100644 --- a/src/nouveau/vulkan/nvk_graphics_pipeline.c +++ b/src/nouveau/vulkan/nvk_graphics_pipeline.c @@ -103,14 +103,6 @@ emit_pipeline_ct_write_state(struct nv_push *p, } } - if (cb != NULL) { - assert(cb->attachment_count == att_count); - uint32_t wm = 0; - for (uint32_t a = 0; a < cb->attachment_count; a++) - wm |= cb->attachments[a].write_mask << (a * 4); - write_mask &= wm; - } - P_IMMD(p, NV9097, SET_MME_SHADOW_SCRATCH(NVK_MME_SCRATCH_WRITE_MASK_PIPELINE), write_mask); diff --git a/src/nouveau/vulkan/nvk_physical_device.c b/src/nouveau/vulkan/nvk_physical_device.c index adc35d6a1bc..d68906f537c 100644 --- a/src/nouveau/vulkan/nvk_physical_device.c +++ b/src/nouveau/vulkan/nvk_physical_device.c @@ -399,7 +399,7 @@ nvk_get_device_features(const struct nv_device_info *info, .extendedDynamicState3LogicOpEnable = true, .extendedDynamicState3ColorBlendEnable = true, .extendedDynamicState3ColorBlendEquation = true, - .extendedDynamicState3ColorWriteMask = false, + .extendedDynamicState3ColorWriteMask = true, .extendedDynamicState3RasterizationStream = false, .extendedDynamicState3ConservativeRasterizationMode = false, .extendedDynamicState3ExtraPrimitiveOverestimationSize = false,
