Module: Mesa Branch: main Commit: 2aea09c8de91c6ae71e1c62f3f213ac89e14943a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2aea09c8de91c6ae71e1c62f3f213ac89e14943a
Author: Sagar Ghuge <[email protected]> Date: Tue Nov 28 10:47:53 2023 -0800 intel/genxml: Add BCS/VD0 aux table base address register Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26409> --- src/intel/genxml/gen12.xml | 6 ++++++ src/intel/genxml/gen125.xml | 3 +++ 2 files changed, 9 insertions(+) diff --git a/src/intel/genxml/gen12.xml b/src/intel/genxml/gen12.xml index 2508c3188c2..e20dab8cf18 100644 --- a/src/intel/genxml/gen12.xml +++ b/src/intel/genxml/gen12.xml @@ -1483,4 +1483,10 @@ <field name="PSS Done" start="26" end="26" type="bool" /> <field name="AMFS Done" start="27" end="27" type="bool" /> </register> + <register name="VD0_AUX_TABLE_BASE_ADDR" length="2" num="0x4210"> + <field name="Address" start="0" end="63" type="uint" /> + </register> + <register name="VD0_CCS_AUX_INV" length="1" num="0x4218"> + <field name="Aux Inv" start="0" end="0" type="bool" /> + </register> </genxml> diff --git a/src/intel/genxml/gen125.xml b/src/intel/genxml/gen125.xml index 2de12601565..d562b63325f 100644 --- a/src/intel/genxml/gen125.xml +++ b/src/intel/genxml/gen125.xml @@ -2117,6 +2117,9 @@ <field name="Destination Depth/Stencil Resource" start="498" end="498" type="bool" /> <field name="Destination Array Index" start="501" end="511" type="uint" /> </instruction> + <register name="BCS_AUX_TABLE_BASE_ADDR" length="2" num="0x4240"> + <field name="Address" start="0" end="63" type="uint" /> + </register> <register name="BCS_CCS_AUX_INV" length="1" num="0x4248"> <field name="Aux Inv" start="0" end="0" type="bool" /> </register>
