Module: Mesa Branch: main Commit: a4947f7bd84128658d14061bf8142ede9a571cdc URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a4947f7bd84128658d14061bf8142ede9a571cdc
Author: Sagar Ghuge <[email protected]> Date: Mon Sep 25 17:33:18 2023 -0700 intel/fs: Adjust destination size for load ubo on Xe2+ Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26639> --- src/intel/compiler/brw_fs_nir.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 4f8b21af505..20923779c76 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -6266,7 +6266,8 @@ fs_nir_emit_intrinsic(nir_to_brw_state &ntb, bld.emit_uniformize(get_nir_src(ntb, load_offset)); } - const unsigned total_dwords = ALIGN(instr->num_components, REG_SIZE / 4); + const unsigned total_dwords = + ALIGN(instr->num_components, REG_SIZE * reg_unit(devinfo) / 4); unsigned loaded_dwords = 0; const fs_reg packed_consts = @@ -6283,7 +6284,8 @@ fs_nir_emit_intrinsic(nir_to_brw_state &ntb, const fs_builder &ubld = block <= 8 ? ubld8 : ubld16; ubld.emit(SHADER_OPCODE_UNALIGNED_OWORD_BLOCK_READ_LOGICAL, retype(byte_offset(packed_consts, loaded_dwords * 4), BRW_REGISTER_TYPE_UD), - srcs, SURFACE_LOGICAL_NUM_SRCS)->size_written = align(block_bytes, REG_SIZE); + srcs, SURFACE_LOGICAL_NUM_SRCS)->size_written = + align(block_bytes, REG_SIZE * reg_unit(devinfo)); loaded_dwords += block;
