Module: Mesa
Branch: main
Commit: d05e81fa7f9551a3dbe2c88e33b4a9975340e4d3
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d05e81fa7f9551a3dbe2c88e33b4a9975340e4d3

Author: Rob Clark <[email protected]>
Date:   Wed Nov 29 08:54:56 2023 -0800

isaspec: Sort labels with same output

In order to get stable results from qsort() across different versions of
libc, toolchain, etc., sort labels with the same offset alphabetically.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10217
Signed-off-by: Rob Clark <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26399>

---

 src/compiler/isaspec/isaspec_decode_impl.c       |   7 +
 src/freedreno/.gitlab-ci/reference/afuc_test.asm | 188 +++++++++++------------
 2 files changed, 101 insertions(+), 94 deletions(-)

diff --git a/src/compiler/isaspec/isaspec_decode_impl.c 
b/src/compiler/isaspec/isaspec_decode_impl.c
index ce4af3db227..61bbd971eb7 100644
--- a/src/compiler/isaspec/isaspec_decode_impl.c
+++ b/src/compiler/isaspec/isaspec_decode_impl.c
@@ -961,6 +961,13 @@ static int
 cmp_entrypoints(const void *_a, const void *_b)
 {
        const struct isa_entrypoint *a = _a, *b = _b;
+
+       /* For stable output, if we have multiple entrypoints with the same
+        * offset, sort them by string name:
+        */
+       if (a->offset == b->offset)
+               return strcmp(a->name, b->name);
+
        return (int)a->offset - (int)b->offset;
 }
 
diff --git a/src/freedreno/.gitlab-ci/reference/afuc_test.asm 
b/src/freedreno/.gitlab-ci/reference/afuc_test.asm
index 9fca2106422..6d39634487a 100644
--- a/src/freedreno/.gitlab-ci/reference/afuc_test.asm
+++ b/src/freedreno/.gitlab-ci/reference/afuc_test.asm
@@ -146,119 +146,95 @@ l116:
 iret
 nop
 
-UNKN0:
-UNKN1:
-UNKN2:
-UNKN3:
-PKT4:
-UNKN5:
-UNKN6:
-UNKN7:
-UNKN8:
-UNKN9:
-IN_IB_END:
-IN_GMU_INTERRUPT:
-UNKN12:
-UNKN13:
-UNKN14:
-CP_NOP:
-CP_RECORD_PFP_TIMESTAMP:
-CP_WAIT_MEM_WRITES:
-CP_WAIT_FOR_ME:
-CP_WAIT_MEM_GTE:
-UNKN21:
-UNKN22:
-UNKN23:
-UNKN24:
-CP_DRAW_PRED_ENABLE_GLOBAL:
-CP_DRAW_PRED_ENABLE_LOCAL:
-UNKN27:
-UNKN28:
-CP_SKIP_IB2_ENABLE_GLOBAL:
-UNKN30:
-UNKN31:
-UNKN32:
-CP_DRAW_INDX:
-CP_SKIP_IB2_ENABLE_LOCAL:
+CP_BLIT:
+CP_BOOTSTRAP_UCODE:
+CP_COND_EXEC:
+CP_COND_INDIRECT_BUFFER_PFE:
+CP_COND_REG_EXEC:
+CP_COND_WRITE5:
+CP_CONTEXT_REG_BUNCH:
+CP_CONTEXT_SWITCH:
+CP_CONTEXT_SWITCH_YIELD:
+CP_CONTEXT_UPDATE:
 CP_DRAW_AUTO:
-CP_SET_STATE:
-CP_WAIT_FOR_IDLE:
-CP_IM_LOAD:
 CP_DRAW_INDIRECT:
-CP_DRAW_INDX_INDIRECT:
 CP_DRAW_INDIRECT_MULTI:
-CP_IM_LOAD_IMMEDIATE:
-CP_BLIT:
-CP_SET_CONSTANT:
-CP_SET_BIN_DATA5_OFFSET:
-CP_SET_BIN_DATA5:
-UNKN48:
-CP_RUN_OPENCL:
-CP_LOAD_STATE6_GEOM:
-CP_EXEC_CS:
-CP_LOAD_STATE6_FRAG:
-CP_SET_SUBDRAW_SIZE:
-CP_LOAD_STATE6:
-CP_INDIRECT_BUFFER_PFD:
+CP_DRAW_INDX:
+CP_DRAW_INDX_INDIRECT:
 CP_DRAW_INDX_OFFSET:
-CP_REG_TEST:
-CP_COND_INDIRECT_BUFFER_PFE:
-CP_INVALIDATE_STATE:
-CP_WAIT_REG_MEM:
-CP_REG_TO_MEM:
+CP_DRAW_PRED_ENABLE_GLOBAL:
+CP_DRAW_PRED_ENABLE_LOCAL:
+CP_DRAW_PRED_SET:
+CP_END_BIN:
+CP_EVENT_WRITE:
+CP_EVENT_WRITE_CFL:
+CP_EVENT_WRITE_SHD:
+CP_EVENT_WRITE_ZPD:
+CP_EXEC_CS:
+CP_EXEC_CS_INDIRECT:
+CP_IM_LOAD:
+CP_IM_LOAD_IMMEDIATE:
 CP_INDIRECT_BUFFER:
+CP_INDIRECT_BUFFER_CHAIN:
+CP_INDIRECT_BUFFER_PFD:
 CP_INTERRUPT:
-CP_EXEC_CS_INDIRECT:
+CP_INVALIDATE_STATE:
+CP_LOAD_STATE6:
+CP_LOAD_STATE6_FRAG:
+CP_LOAD_STATE6_GEOM:
 CP_MEM_TO_REG:
-CP_SET_DRAW_STATE:
-CP_COND_EXEC:
-CP_COND_WRITE5:
-CP_EVENT_WRITE:
-CP_COND_REG_EXEC:
-UNKN73:
+CP_MEM_WRITE_CNTR:
+CP_NOP:
+CP_PREEMPT_DISABLE:
+CP_RECORD_PFP_TIMESTAMP:
+CP_REG_TEST:
+CP_REG_TO_MEM:
+CP_REG_TO_MEM_OFFSET_MEM:
+CP_REG_TO_MEM_OFFSET_REG:
 CP_REG_TO_SCRATCH:
-CP_SET_DRAW_INIT_FLAGS:
+CP_REG_WRITE:
+CP_REG_WR_NO_CTXT:
+CP_RUN_OPENCL:
 CP_SCRATCH_TO_REG:
-CP_DRAW_PRED_SET:
-CP_MEM_WRITE_CNTR:
-CP_START_BIN:
-CP_END_BIN:
-CP_WAIT_REG_EQ:
-CP_SMMU_TABLE_UPDATE:
-CP_CONTEXT_SWITCH:
+CP_SET_BIN_DATA5:
+CP_SET_BIN_DATA5_OFFSET:
+CP_SET_CONSTANT:
 CP_SET_CTXSWITCH_IB:
-CP_SET_PSEUDO_REG:
-CP_INDIRECT_BUFFER_CHAIN:
-CP_EVENT_WRITE_SHD:
-CP_EVENT_WRITE_CFL:
-UNKN90:
-CP_EVENT_WRITE_ZPD:
-CP_CONTEXT_REG_BUNCH:
-UNKN93:
-CP_CONTEXT_UPDATE:
-CP_SET_PROTECTED_MODE:
-UNKN96:
-UNKN97:
-CP_WHERE_AM_I:
+CP_SET_DRAW_INIT_FLAGS:
+CP_SET_DRAW_STATE:
+CP_SET_MARKER:
 CP_SET_MODE:
+CP_SET_PROTECTED_MODE:
+CP_SET_PSEUDO_REG:
+CP_SET_STATE:
+CP_SET_SUBDRAW_SIZE:
 CP_SET_VISIBILITY_OVERRIDE:
-CP_SET_MARKER:
+CP_SKIP_IB2_ENABLE_GLOBAL:
+CP_SKIP_IB2_ENABLE_LOCAL:
+CP_SMMU_TABLE_UPDATE:
+CP_START_BIN:
+CP_TEST_TWO_MEMS:
+CP_WAIT_FOR_IDLE:
+CP_WAIT_FOR_ME:
+CP_WAIT_MEM_GTE:
+CP_WAIT_MEM_WRITES:
+CP_WAIT_REG_EQ:
+CP_WAIT_REG_MEM:
+CP_WAIT_TWO_REGS:
+CP_WHERE_AM_I:
+IN_GMU_INTERRUPT:
+IN_IB_END:
+PKT4:
+UNKN0:
+UNKN1:
 UNKN103:
 UNKN104:
 UNKN105:
 UNKN106:
-CP_CONTEXT_SWITCH_YIELD:
-CP_PREEMPT_DISABLE:
-CP_REG_WRITE:
 UNKN110:
-CP_BOOTSTRAP_UCODE:
-CP_WAIT_TWO_REGS:
-CP_TEST_TWO_MEMS:
-CP_REG_TO_MEM_OFFSET_REG:
-CP_REG_TO_MEM_OFFSET_MEM:
 UNKN118:
 UNKN119:
-CP_REG_WR_NO_CTXT:
+UNKN12:
 UNKN121:
 UNKN122:
 UNKN123:
@@ -266,6 +242,30 @@ UNKN124:
 UNKN125:
 UNKN126:
 UNKN127:
+UNKN13:
+UNKN14:
+UNKN2:
+UNKN21:
+UNKN22:
+UNKN23:
+UNKN24:
+UNKN27:
+UNKN28:
+UNKN3:
+UNKN30:
+UNKN31:
+UNKN32:
+UNKN48:
+UNKN5:
+UNKN6:
+UNKN7:
+UNKN73:
+UNKN8:
+UNKN9:
+UNKN90:
+UNKN93:
+UNKN96:
+UNKN97:
 waitin
 mov $01, $data
 [00000076]

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