Module: Mesa
Branch: main
Commit: 1b7107efe41406b707f5907269936e6332ec3db2
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b7107efe41406b707f5907269936e6332ec3db2

Author: Timothy Arceri <[email protected]>
Date:   Wed Nov 22 17:01:45 2023 +1100

glsl: drop ir_binop_ubo_load

This was missed in e566b54a59d1

Reviewed-by: Marek Olšák <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26330>

---

 src/compiler/glsl/glsl_to_nir.cpp            | 5 -----
 src/compiler/glsl/ir.h                       | 1 -
 src/compiler/glsl/ir_expression_operation.py | 6 ------
 src/compiler/glsl/ir_validate.cpp            | 6 ------
 4 files changed, 18 deletions(-)

diff --git a/src/compiler/glsl/glsl_to_nir.cpp 
b/src/compiler/glsl/glsl_to_nir.cpp
index 51712f3c058..f509a9e1942 100644
--- a/src/compiler/glsl/glsl_to_nir.cpp
+++ b/src/compiler/glsl/glsl_to_nir.cpp
@@ -1922,11 +1922,6 @@ nir_visitor::visit(ir_expression *ir)
       return;
    }
 
-   case ir_binop_ubo_load:
-      /* UBO loads should only have been lowered in GLSL IR for non-nir 
drivers,
-       * NIR drivers make use of gl_nir_lower_buffers() instead.
-       */
-      unreachable("Invalid operation nir doesn't want lowered ubo loads");
    default:
       break;
    }
diff --git a/src/compiler/glsl/ir.h b/src/compiler/glsl/ir.h
index b921714062b..65d36f9b7de 100644
--- a/src/compiler/glsl/ir.h
+++ b/src/compiler/glsl/ir.h
@@ -1538,7 +1538,6 @@ public:
              operation == ir_binop_dot ||
              operation == ir_binop_vector_extract ||
              operation == ir_triop_vector_insert ||
-             operation == ir_binop_ubo_load ||
              operation == ir_quadop_vector;
    }
 
diff --git a/src/compiler/glsl/ir_expression_operation.py 
b/src/compiler/glsl/ir_expression_operation.py
index fa3118b249b..0b8cc0a1073 100644
--- a/src/compiler/glsl/ir_expression_operation.py
+++ b/src/compiler/glsl/ir_expression_operation.py
@@ -712,12 +712,6 @@ ir_expression_operation = [
 
    operation("pow", 2, source_types=(float_type,), c_expression="powf({src0}, 
{src1})"),
 
-   # Load a value the size of a given GLSL type from a uniform block.
-   #
-   # operand0 is the ir_constant uniform block index in the linked shader.
-   # operand1 is a byte offset within the uniform block.
-   operation("ubo_load", 2),
-
    # Multiplies a number by two to a power, part of ARB_gpu_shader5.
    operation("ldexp", 2,
              all_signatures=((float_type, (float_type, int_type)),
diff --git a/src/compiler/glsl/ir_validate.cpp 
b/src/compiler/glsl/ir_validate.cpp
index 165a218ab62..d16997146a6 100644
--- a/src/compiler/glsl/ir_validate.cpp
+++ b/src/compiler/glsl/ir_validate.cpp
@@ -847,12 +847,6 @@ ir_validate::visit_leave(ir_expression *ir)
       assert(ir->operands[0]->type == ir->operands[1]->type);
       break;
 
-   case ir_binop_ubo_load:
-      assert(ir->operands[0]->type == glsl_type::uint_type);
-
-      assert(ir->operands[1]->type == glsl_type::uint_type);
-      break;
-
    case ir_binop_ldexp:
       assert(ir->operands[0]->type == ir->type);
       assert(ir->operands[0]->type->is_float_32_64());

Reply via email to