Module: Mesa
Branch: main
Commit: 37f11ff1d49469a6f2fba876fca6c2742d0aae4a
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=37f11ff1d49469a6f2fba876fca6c2742d0aae4a

Author: Danylo Piliaiev <[email protected]>
Date:   Tue Oct 24 12:14:41 2023 +0200

freedreno/devices: Support Adreno 725

For 0x07030002 chip id different names are returned on different
phones: Adreno730v3 or Adreno725v1. Settle on 725 to disambiguate
them.

The only difference from base 730 is that it has conditional
execution of compute shader at the start of every command buffer.

Signed-off-by: Danylo Piliaiev <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25888>

---

 src/freedreno/common/freedreno_devices.py | 103 ++++++++++++++++++------------
 1 file changed, 63 insertions(+), 40 deletions(-)

diff --git a/src/freedreno/common/freedreno_devices.py 
b/src/freedreno/common/freedreno_devices.py
index cf6e9d0fab7..3ec46c1c32b 100644
--- a/src/freedreno/common/freedreno_devices.py
+++ b/src/freedreno/common/freedreno_devices.py
@@ -704,6 +704,8 @@ add_gpus([
         )
     ))
 
+a7xx_725 = A7XXProps()
+
 a7xx_730 = A7XXProps()
 
 a7xx_740 = A7XXProps(
@@ -711,6 +713,65 @@ a7xx_740 = A7XXProps(
         has_event_write_sample_count = True,
     )
 
+a730_magic_regs = dict(
+        TPL1_DBG_ECO_CNTL = 0x1000000,
+        GRAS_DBG_ECO_CNTL = 0x800,
+        SP_CHICKEN_BITS = 0x1440,
+        UCHE_CLIENT_PF = 0x00000084,
+        PC_MODE_CNTL = 0x0000003f, # 0x00001f1f in some tests
+        SP_DBG_ECO_CNTL = 0x10000000,
+        RB_DBG_ECO_CNTL = 0x00000000,
+        RB_DBG_ECO_CNTL_blit = 0x00000000,  # is it even needed?
+        RB_UNKNOWN_8E01 = 0x0,
+        VPC_DBG_ECO_CNTL = 0x02000000,
+        UCHE_UNKNOWN_0E12 = 0x3200000
+    )
+
+a730_raw_magic_regs = [
+        [A6XXRegs.REG_A6XX_UCHE_CACHE_WAYS, 0x00840004],
+        [A6XXRegs.REG_A6XX_TPL1_UNKNOWN_B602, 0x00000724],
+
+        [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE08, 0x00002400],
+        [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE09, 0x00000000],
+        [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE0A, 0x00000000],
+        [A6XXRegs.REG_A7XX_UCHE_UNKNOWN_0E10, 0x00000000],
+        [A6XXRegs.REG_A7XX_UCHE_UNKNOWN_0E11, 0x00000040],
+        [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE6C, 0x00008000],
+        [A6XXRegs.REG_A6XX_PC_DBG_ECO_CNTL, 0x20080000],
+        [A6XXRegs.REG_A7XX_PC_UNKNOWN_9E24, 0x21fc7f00],
+        [A6XXRegs.REG_A7XX_VFD_UNKNOWN_A600, 0x00000000],
+        [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE06, 0x00000000],
+        [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE6A, 0x00000000],
+        [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE6B, 0x00000080],
+        [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE73, 0x00000000],
+        [A6XXRegs.REG_A7XX_SP_UNKNOWN_AB02, 0x00000000],
+        [A6XXRegs.REG_A7XX_SP_UNKNOWN_AB01, 0x00000000],
+        [A6XXRegs.REG_A7XX_SP_UNKNOWN_AB22, 0x00000000],
+        [A6XXRegs.REG_A7XX_SP_UNKNOWN_B310, 0x00000000],
+
+        [A6XXRegs.REG_A7XX_GRAS_UNKNOWN_8120, 0x09510840],
+        [A6XXRegs.REG_A7XX_GRAS_UNKNOWN_8121, 0x00000a62],
+    ]
+
+add_gpus([
+        # These are named as Adreno730v3 or Adreno725v1.
+        GPUId(chip_id=0x07030002, name="FD725"),
+        GPUId(chip_id=0xffff07030002, name="FD725"),
+    ], A6xxGPUInfo(
+        CHIP.A7XX,
+        [a6xx_gen4, a7xx_725],
+        num_ccu = 4,
+        tile_align_w = 64,
+        tile_align_h = 32,
+        num_vsc_pipes = 32,
+        cs_shared_mem_size = 32 * 1024,
+        wave_granularity = 2,
+        fibers_per_sp = 128 * 2 * 16,
+        magic_regs = a730_magic_regs,
+        raw_magic_regs = a730_raw_magic_regs,
+        max_sets = 8,
+    ))
+
 add_gpus([
         GPUId(chip_id=0x07030001, name="FD730"), # KGSL, no speedbin data
         GPUId(chip_id=0xffff07030001, name="FD730"), # Default no-speedbin 
fallback
@@ -724,46 +785,8 @@ add_gpus([
         cs_shared_mem_size = 32 * 1024,
         wave_granularity = 2,
         fibers_per_sp = 128 * 2 * 16,
-        magic_regs = dict(
-            # PC_POWER_CNTL = 7,
-            TPL1_DBG_ECO_CNTL = 0x1000000,
-            GRAS_DBG_ECO_CNTL = 0x800,
-            SP_CHICKEN_BITS = 0x1440,
-            UCHE_CLIENT_PF = 0x00000084,
-            PC_MODE_CNTL = 0x0000003f, # 0x00001f1f in some tests
-            SP_DBG_ECO_CNTL = 0x10000000,
-            RB_DBG_ECO_CNTL = 0x00000000,
-            RB_DBG_ECO_CNTL_blit = 0x00000000,  # is it even needed?
-            # HLSQ_DBG_ECO_CNTL = 0x0,
-            RB_UNKNOWN_8E01 = 0x0,
-            VPC_DBG_ECO_CNTL = 0x02000000,
-            UCHE_UNKNOWN_0E12 = 0x3200000
-        ),
-        raw_magic_regs = [
-            [A6XXRegs.REG_A6XX_UCHE_CACHE_WAYS, 0x00840004],
-            [A6XXRegs.REG_A6XX_TPL1_UNKNOWN_B602, 0x00000724],
-
-            [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE08, 0x00002400],
-            [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE09, 0x00000000],
-            [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE0A, 0x00000000],
-            [A6XXRegs.REG_A7XX_UCHE_UNKNOWN_0E10, 0x00000000],
-            [A6XXRegs.REG_A7XX_UCHE_UNKNOWN_0E11, 0x00000040],
-            [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE6C, 0x00008000],
-            [A6XXRegs.REG_A6XX_PC_DBG_ECO_CNTL, 0x20080000],
-            [A6XXRegs.REG_A7XX_PC_UNKNOWN_9E24, 0x21fc7f00],
-            [A6XXRegs.REG_A7XX_VFD_UNKNOWN_A600, 0x00000000],
-            [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE06, 0x00000000],
-            [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE6A, 0x00000000],
-            [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE6B, 0x00000080],
-            [A6XXRegs.REG_A7XX_SP_UNKNOWN_AE73, 0x00000000],
-            [A6XXRegs.REG_A7XX_SP_UNKNOWN_AB02, 0x00000000],
-            [A6XXRegs.REG_A7XX_SP_UNKNOWN_AB01, 0x00000000],
-            [A6XXRegs.REG_A7XX_SP_UNKNOWN_AB22, 0x00000000],
-            [A6XXRegs.REG_A7XX_SP_UNKNOWN_B310, 0x00000000],
-
-            [A6XXRegs.REG_A7XX_GRAS_UNKNOWN_8120, 0x09510840],
-            [A6XXRegs.REG_A7XX_GRAS_UNKNOWN_8121, 0x00000a62],
-        ],
+        magic_regs = a730_magic_regs,
+        raw_magic_regs = a730_raw_magic_regs,
         max_sets = 8,
     ))
 

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