Module: Mesa Branch: main Commit: ee48b12a8f56a171f0f8fc6ce6c5bc60aa103fe7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ee48b12a8f56a171f0f8fc6ce6c5bc60aa103fe7
Author: Sagar Ghuge <[email protected]> Date: Thu Nov 9 14:56:52 2023 -0800 anv: Avoid emitting PIPE_CONTROL command for copy/video queue Avoid emitting PIPE_CONTROL instruction since Copy/Video doesn't support it. Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26121> --- src/intel/vulkan/genX_cmd_buffer.c | 11 ++++++++++- src/intel/vulkan/genX_cmd_draw_generated_indirect.h | 3 +++ src/intel/vulkan/genX_gfx_state.c | 3 +++ src/intel/vulkan/genX_init_state.c | 3 +++ 4 files changed, 19 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 4985d40a85f..45f60ad6ec5 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -90,6 +90,10 @@ convert_pc_to_bits(struct GENX(PIPE_CONTROL) *pc) { void genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer) { + if (anv_cmd_buffer_is_blitter_queue(cmd_buffer) || + anv_cmd_buffer_is_video_queue(cmd_buffer)) + return; + struct anv_device *device = cmd_buffer->device; uint32_t mocs = isl_mocs(&device->isl_dev, 0, false); @@ -2849,6 +2853,10 @@ genX(batch_emit_pipe_control_write)(struct anv_batch *batch, enum anv_pipe_bits bits, const char *reason) { + if ((batch->engine_class == INTEL_ENGINE_CLASS_COPY) || + (batch->engine_class == INTEL_ENGINE_CLASS_VIDEO)) + unreachable("Trying to emit unsupported PIPE_CONTROL command."); + /* XXX - insert all workarounds and GFX specific things below. */ /* Wa_14014966230: For COMPUTE Workload - Any PIPE_CONTROL command with @@ -3698,7 +3706,8 @@ genX(CmdExecuteCommands)( } #if INTEL_NEEDS_WA_16014538804 - if (intel_needs_workaround(device->info, 16014538804)) + if (anv_cmd_buffer_is_render_queue(container) && + intel_needs_workaround(device->info, 16014538804)) anv_batch_emit(&container->batch, GENX(PIPE_CONTROL), pc); #endif diff --git a/src/intel/vulkan/genX_cmd_draw_generated_indirect.h b/src/intel/vulkan/genX_cmd_draw_generated_indirect.h index 943a9700eed..5c9c5a48d46 100644 --- a/src/intel/vulkan/genX_cmd_draw_generated_indirect.h +++ b/src/intel/vulkan/genX_cmd_draw_generated_indirect.h @@ -622,6 +622,9 @@ genX(cmd_buffer_emit_indirect_generated_draws)(struct anv_cmd_buffer *cmd_buffer static void genX(cmd_buffer_flush_generated_draws)(struct anv_cmd_buffer *cmd_buffer) { + if (!anv_cmd_buffer_is_render_queue(cmd_buffer)) + return; + /* No return address setup means we don't have to do anything */ if (anv_address_is_null(cmd_buffer->generation.return_addr)) return; diff --git a/src/intel/vulkan/genX_gfx_state.c b/src/intel/vulkan/genX_gfx_state.c index d2cd30dfbe0..20ddb45a351 100644 --- a/src/intel/vulkan/genX_gfx_state.c +++ b/src/intel/vulkan/genX_gfx_state.c @@ -1906,6 +1906,9 @@ genX(cmd_buffer_flush_gfx_hw_state)(struct anv_cmd_buffer *cmd_buffer) void genX(cmd_buffer_enable_pma_fix)(struct anv_cmd_buffer *cmd_buffer, bool enable) { + if (!anv_cmd_buffer_is_render_queue(cmd_buffer)) + return; + if (cmd_buffer->state.pma_fix_enabled == enable) return; diff --git a/src/intel/vulkan/genX_init_state.c b/src/intel/vulkan/genX_init_state.c index 3216678087a..ae559e43589 100644 --- a/src/intel/vulkan/genX_init_state.c +++ b/src/intel/vulkan/genX_init_state.c @@ -1166,6 +1166,9 @@ VkResult genX(CreateSampler)( void genX(apply_task_urb_workaround)(struct anv_cmd_buffer *cmd_buffer) { + if (!anv_cmd_buffer_is_render_queue(cmd_buffer)) + return; + #if GFX_VERx10 >= 125 const struct intel_device_info *devinfo = &cmd_buffer->device->physical->info;
