| Issue |
150162
|
| Summary |
Remove header mask from EVL tail folded VPInterleaveRecipes
|
| Labels |
backend:RISC-V,
vectorizers
|
| Assignees |
|
| Reporter |
lukel97
|
After #149981/#150074, we generate tail folded loops with interleaved accesses.
This should work with EVL tail folding, but we will still emit a mask to control the tail. In `optimizeMaskToEVL` in VPlanTransforms, we should try and remove the mask if possible to convert the wide loads/stores to VP intrinsics.
The wide masked loads and stores are generated inside VPInterleaveRecipe. We could create a VLEVLInterleaveRecipe to generate VP intrinsics instead, or maybe we could look at splitting up VPInterleaveRecipe to take the wide loads/stores as a separate operand to avoid creating a new recipe.
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