| Issue |
149034
|
| Summary |
[AArch64] SMIN: Bad machine code: Using an undefined physical register
|
| Labels |
backend:AArch64
|
| Assignees |
|
| Reporter |
sjoerdmeijer
|
For a build with expensive checks enabled, this input:
```
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "aarch64-unknown-linux-gnu"
define void @_Z1fPxPA4_x(i1 %0) #0 {
entry:
br label %for.cond
for.cond: ; preds = %middle.block, %entry
%.sroa.speculated51.us.us67 = phi i32 [ %8, %middle.block ], [ 0, %entry ]
%1 = tail call <vscale x 4 x i64> @llvm.smin.nxv4i64(<vscale x 4 x i64> insertelement (<vscale x 4 x i64> poison, i64 0, i64 0), <vscale x 4 x i64> splat (i64 3))
%2 = trunc <vscale x 4 x i64> %1 to <vscale x 4 x i32>
%broadcast.splatinsert81 = insertelement <vscale x 4 x i32> zeroinitializer, i32 %.sroa.speculated51.us.us67, i64 0
br label %vector.body
vector.body: ; preds = %vector.body, %for.cond
%index = phi i64 [ 0, %for.cond ], [ %index.next, %vector.body ]
%vec.phi = phi <vscale x 4 x i32> [ %broadcast.splatinsert81, %for.cond ], [ %4, %vector.body ]
%3 = getelementptr [0 x i16], ptr null, i64 0, i64 %index
%4 = tail call <vscale x 4 x i32> @llvm.umin.nxv4i32(<vscale x 4 x i32> %vec.phi, <vscale x 4 x i32> %2)
%5 = select <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i32> %vec.phi, <vscale x 4 x i32> zeroinitializer
%index.next = or i64 %index, 1
br i1 %0, label %vector.body, label %middle.block
middle.block: ; preds = %vector.body
%6 = tail call <vscale x 4 x i64> @llvm.smin.nxv4i64(<vscale x 4 x i64> insertelement (<vscale x 4 x i64> poison, i64 0, i64 0), <vscale x 4 x i64> splat (i64 3))
%7 = trunc <vscale x 4 x i64> %6 to <vscale x 4 x i32>
%8 = tail call i32 @llvm.vector.reduce.umin.nxv4i32(<vscale x 4 x i32> %7)
br label %for.cond
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <vscale x 4 x i64> @llvm.smin.nxv4i64(<vscale x 4 x i64>, <vscale x 4 x i64>) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare <vscale x 4 x i32> @llvm.umin.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32>) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.umin.nxv4i32(<vscale x 4 x i32>) #1
; uselistorder directives
uselistorder ptr @llvm.smin.nxv4i64, { 1, 0 }
attributes #0 = { "target-cpu"="grace" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
```
runs into this error when compiled with `llc test.ll`:
```
*** Bad machine code: Using an undefined physical register ***
- function: _Z1fPxPA4_x
- basic block: %bb.0 entry (0xaaaaaf6c37f8)
- instruction: $z0 = SMIN_ZPmZ_D renamable $p2, killed $z0(tied-def 0), renamable $z2
- operand 2: killed $z0(tied-def 0)
LLVM ERROR: Found 1 machine code errors.
```
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