https://github.com/c-rhodes updated https://github.com/llvm/llvm-project/pull/176229
>From 9ad10cb8eaca25f997335ffe4847af0fe6d626c2 Mon Sep 17 00:00:00 2001 From: Usman Nadeem <[email protected]> Date: Thu, 15 Jan 2026 11:27:13 -0800 Subject: [PATCH] [ARM] Add size to `tLDRLIT_ga_pcrel|abs` Pseudo Instructions (#175663) Compiling OpenSSL for Thumb was giving a crash in `ARMConstantIslands` with error message: "underestimated function size". Adding a size for `tLDRLIT_ga_pcrel` pseudo instruction fixes the issue. Also added a size for `tLDRLIT_ga_abs` as per review comments. (cherry picked from commit c49c7e72b3708f219d3967831e67c82ed9ac55e3) --- llvm/lib/Target/ARM/ARMInstrThumb.td | 8 ++- llvm/test/CodeGen/ARM/tldrlit_ga_size.mir | 77 +++++++++++++++++++++++ 2 files changed, 83 insertions(+), 2 deletions(-) create mode 100644 llvm/test/CodeGen/ARM/tldrlit_ga_size.mir diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td index 0ee98e68de68d..4c5d81012da32 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb.td @@ -1605,13 +1605,17 @@ def tLDRLIT_ga_pcrel : PseudoInst<(outs tGPR:$dst), (ins i32imm:$addr), IIC_iLoadiALU, [(set tGPR:$dst, (ARMWrapperPIC tglobaladdr:$addr))]>, - Requires<[IsThumb, DontUseMovtInPic]>; + Requires<[IsThumb, DontUseMovtInPic]> { + let Size = 8; // 2 instructions + constant. +} def tLDRLIT_ga_abs : PseudoInst<(outs tGPR:$dst), (ins i32imm:$src), IIC_iLoad_i, [(set tGPR:$dst, (ARMWrapper tglobaladdr:$src))]>, - Requires<[IsThumb, DontUseMovt, DontGenExecuteOnly]>; + Requires<[IsThumb, DontUseMovt, DontGenExecuteOnly]> { + let Size = 6; // 1 instruction + constant. +} // 32-bit immediate using mov/add with the 4 :lower0_7: to :upper8_15: // relocations. diff --git a/llvm/test/CodeGen/ARM/tldrlit_ga_size.mir b/llvm/test/CodeGen/ARM/tldrlit_ga_size.mir new file mode 100644 index 0000000000000..189372aa110a2 --- /dev/null +++ b/llvm/test/CodeGen/ARM/tldrlit_ga_size.mir @@ -0,0 +1,77 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6 +# RUN: llc -run-pass=prologepilog %s -o - | FileCheck %s + +--- | + target triple = "thumbv5e-none-darwin" + + @.str = external constant [26 x i8] + + define ptr @f_pcrel() { + entry: + ret ptr @.str + } + define ptr @f_abs() { + entry: + ret ptr @.str + } +... +--- +name: f_pcrel +alignment: 2 +tracksRegLiveness: true +noPhis: true +isSSA: false +noVRegs: true +hasFakeUses: false +tracksDebugUserValues: true +frameInfo: + maxAlignment: 1 + maxCallFrameSize: 0 +machineFunctionInfo: + isLRSpilled: false +body: | + bb.0.entry: + ; CHECK-LABEL: name: f_pcrel + ; CHECK: liveins: $lr + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $lr, implicit-def $sp, implicit $sp + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 4 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4 + ; CHECK-NEXT: dead $r0 = SPACE 2036, undef $r0 + ; CHECK-NEXT: renamable $r0 = tLDRLIT_ga_pcrel target-flags(arm-nonlazy) @.str + ; CHECK-NEXT: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from got) + ; CHECK-NEXT: frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $pc, implicit-def $sp, implicit $sp, implicit $r0 + dead $r0 = SPACE 2036, undef $r0 + renamable $r0 = tLDRLIT_ga_pcrel target-flags(arm-nonlazy) @.str + renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from got) + tBX_RET 14 /* CC::al */, $noreg, implicit $r0 +... +--- +name: f_abs +alignment: 2 +tracksRegLiveness: true +noPhis: true +isSSA: false +noVRegs: true +hasFakeUses: false +tracksDebugUserValues: true +frameInfo: + maxAlignment: 1 + maxCallFrameSize: 0 +machineFunctionInfo: + isLRSpilled: false +body: | + bb.0.entry: + ; CHECK-LABEL: name: f_abs + ; CHECK: liveins: $lr + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $lr, implicit-def $sp, implicit $sp + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 4 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4 + ; CHECK-NEXT: dead $r0 = SPACE 2040, undef $r0 + ; CHECK-NEXT: renamable $r0 = tLDRLIT_ga_abs target-flags(arm-nonlazy) @.str + ; CHECK-NEXT: frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $pc, implicit-def $sp, implicit $sp, implicit $r0 + dead $r0 = SPACE 2040, undef $r0 + renamable $r0 = tLDRLIT_ga_abs target-flags(arm-nonlazy) @.str + tBX_RET 14 /* CC::al */, $noreg, implicit $r0 +... _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
