llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-amdgpu Author: Shilei Tian (shiltian) <details> <summary>Changes</summary> Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin@<!-- -->amd.com> --- Full diff: https://github.com/llvm/llvm-project/pull/150059.diff 2 Files Affected: - (modified) llvm/lib/Target/AMDGPU/SIISelLowering.cpp (+1) - (added) llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll (+44) ``````````diff diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index bc0fd8d4e814b..d65c3ae76566b 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -13633,6 +13633,7 @@ bool SITargetLowering::isCanonicalized(SelectionDAG &DAG, SDValue Op, case Intrinsic::amdgcn_rcp_legacy: case Intrinsic::amdgcn_rsq_legacy: case Intrinsic::amdgcn_trig_preop: + case Intrinsic::amdgcn_tanh: case Intrinsic::amdgcn_log: case Intrinsic::amdgcn_exp2: case Intrinsic::amdgcn_sqrt: diff --git a/llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll b/llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll new file mode 100644 index 0000000000000..85e7038b38563 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll @@ -0,0 +1,44 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 %s -o - | FileCheck -check-prefix=GCN %s + +define float @test_canonicalize_amdgcn_tanh_f32(float %a) { +; GCN-LABEL: test_canonicalize_amdgcn_tanh_f32: +; GCN: ; %bb.0: +; GCN-NEXT: s_wait_loadcnt_dscnt 0x0 +; GCN-NEXT: s_wait_kmcnt 0x0 +; GCN-NEXT: v_tanh_f32_e32 v0, v0 +; GCN-NEXT: s_set_pc_i64 s[30:31] + %tanh = call float @llvm.amdgcn.tanh.f32(float %a) + %canonicalized = call float @llvm.canonicalize.f32(float %tanh) + ret float %canonicalized +} + +define bfloat @test_canonicalize_amdgcn_tanh_bf16(bfloat %a) { +; GCN-LABEL: test_canonicalize_amdgcn_tanh_bf16: +; GCN: ; %bb.0: +; GCN-NEXT: s_wait_loadcnt_dscnt 0x0 +; GCN-NEXT: s_wait_kmcnt 0x0 +; GCN-NEXT: v_tanh_bf16_e32 v0, v0 +; GCN-NEXT: v_nop +; GCN-NEXT: s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GCN-NEXT: v_lshlrev_b32_e32 v0, 16, v0 +; GCN-NEXT: v_max_num_f32_e32 v0, v0, v0 +; GCN-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GCN-NEXT: v_cvt_pk_bf16_f32 v0, v0, s0 +; GCN-NEXT: s_set_pc_i64 s[30:31] + %tanh = call bfloat @llvm.amdgcn.tanh.bf16(bfloat %a) + %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat %tanh) + ret bfloat %canonicalized +} + +define half @test_canonicalize_amdgcn_tanh_f16(half %a) { +; GCN-LABEL: test_canonicalize_amdgcn_tanh_f16: +; GCN: ; %bb.0: +; GCN-NEXT: s_wait_loadcnt_dscnt 0x0 +; GCN-NEXT: s_wait_kmcnt 0x0 +; GCN-NEXT: v_tanh_f16_e32 v0, v0 +; GCN-NEXT: s_set_pc_i64 s[30:31] + %tanh = call half @llvm.amdgcn.tanh.f16(half %a) + %canonicalized = call half @llvm.canonicalize.f16(half %tanh) + ret half %canonicalized +} `````````` </details> https://github.com/llvm/llvm-project/pull/150059 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
