================ @@ -0,0 +1,98 @@ +//===----------- SparcInstrCrypto.td - cryptographic extensions -----------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file contains instruction formats, definitions and patterns needed for +// cryptographic instructions on SPARC. +//===----------------------------------------------------------------------===// + + +// Convenience template for 4-operand instructions +class FourOpImm<string OpcStr, bits<6> op3val, bits<4> op5val, + RegisterClass RC> + : F3_4<op3val, op5val, (outs RC:$rd), (ins RC:$rs1, RC:$rs2, simm5Op:$rs3), + !strconcat(OpcStr, " $rs1, $rs2, $rs3, $rd")>; + +let Predicates = [HasCrypto] in { +def AES_EROUND01 : FourOp<"aes_eround01", 0b011001, 0b0000, DFPRegs>; +def AES_EROUND23 : FourOp<"aes_eround23", 0b011001, 0b0001, DFPRegs>; +def AES_DROUND01 : FourOp<"aes_dround01", 0b011001, 0b0010, DFPRegs>; +def AES_DROUND23 : FourOp<"aes_dround23", 0b011001, 0b0011, DFPRegs>; +def AES_EROUND01_LAST : FourOp<"aes_eround01_l", 0b011001, 0b0100, DFPRegs>; +def AES_EROUND23_LAST : FourOp<"aes_eround23_l", 0b011001, 0b0101, DFPRegs>; +def AES_DROUND01_LAST : FourOp<"aes_dround01_l", 0b011001, 0b0110, DFPRegs>; +def AES_DROUND23_LAST : FourOp<"aes_dround23_l", 0b011001, 0b0111, DFPRegs>; +def AES_KEXPAND0 : F3_3<2, 0b110110, 0b100110000, + (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2), + "aes_kexpand0 $rs1, $rs2, $rd", []>; +def AES_KEXPAND1 : FourOpImm<"aes_kexpand1", 0b011001, 0b1000, DFPRegs>; +def AES_KEXPAND2 : F3_3<2, 0b110110, 0b100110001, + (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2), + "aes_kexpand2 $rs1, $rs2, $rd", []>; + +def CAMELLIA_F : FourOp<"camellia_f", 0b011001, 0b1100, DFPRegs>; +def CAMELLIA_FL : F3_3<2, 0b110110, 0b100111100, + (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2), + "camellia_fl $rs1, $rs2, $rd", []>; +def CAMELLIA_FLI : F3_3<2, 0b110110, 0b100111101, + (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2), ---------------- s-barannikov wrote:
Ditto https://github.com/llvm/llvm-project/pull/139451 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
