================
@@ -205,7 +207,14 @@ class AMDGPURegBankLegalizeCombiner {
   bool tryEliminateReadAnyLane(MachineInstr &Copy) {
     Register Dst = Copy.getOperand(0).getReg();
     Register Src = Copy.getOperand(1).getReg();
-    if (!Src.isVirtual())
+
+    // Skip non-vgpr Dst
+    if (Dst.isVirtual() ? (MRI.getRegBankOrNull(Dst) != VgprRB)
+                        : !TRI.isVGPR(MRI, Dst))
+      return false;
+
+    // Skip physical source registers and source registers with register class
----------------
arsenm wrote:

This shouldn't happen? 

https://github.com/llvm/llvm-project/pull/142790
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