================ @@ -205,7 +207,14 @@ class AMDGPURegBankLegalizeCombiner { bool tryEliminateReadAnyLane(MachineInstr &Copy) { Register Dst = Copy.getOperand(0).getReg(); Register Src = Copy.getOperand(1).getReg(); - if (!Src.isVirtual()) + + // Skip non-vgpr Dst + if (Dst.isVirtual() ? (MRI.getRegBankOrNull(Dst) != VgprRB) + : !TRI.isVGPR(MRI, Dst)) + return false; + + // Skip physical source registers and source registers with register class ---------------- arsenm wrote:
This shouldn't happen? https://github.com/llvm/llvm-project/pull/142790 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits