https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/143832
This was defining aliases of the i32 divrem functions for the i8
and i16 cases. This is unnecessary and was unused. The divrem
candidate cases wouldn't have formed with illegal types in the
first place, so codegen wouldn't even query these.
>From 47f1862490bdea686084f7ec71110cbed749a624 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <matthew.arsena...@amd.com>
Date: Thu, 12 Jun 2025 13:53:16 +0900
Subject: [PATCH] ARM: Remove fake entries for divrem libcalls
This was defining aliases of the i32 divrem functions for the i8
and i16 cases. This is unnecessary and was unused. The divrem
candidate cases wouldn't have formed with illegal types in the
first place, so codegen wouldn't even query these.
---
llvm/lib/IR/RuntimeLibcalls.cpp | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/llvm/lib/IR/RuntimeLibcalls.cpp b/llvm/lib/IR/RuntimeLibcalls.cpp
index 331b319511aed..d84c56f0af5c6 100644
--- a/llvm/lib/IR/RuntimeLibcalls.cpp
+++ b/llvm/lib/IR/RuntimeLibcalls.cpp
@@ -41,13 +41,8 @@ static void setARMLibcallNames(RuntimeLibcallsInfo &Info,
const Triple &TT) {
const char *const Name;
const CallingConv::ID CC;
} LibraryCalls[] = {
- {RTLIB::SDIVREM_I8, "__rt_sdiv", CallingConv::ARM_AAPCS},
- {RTLIB::SDIVREM_I16, "__rt_sdiv", CallingConv::ARM_AAPCS},
{RTLIB::SDIVREM_I32, "__rt_sdiv", CallingConv::ARM_AAPCS},
{RTLIB::SDIVREM_I64, "__rt_sdiv64", CallingConv::ARM_AAPCS},
-
- {RTLIB::UDIVREM_I8, "__rt_udiv", CallingConv::ARM_AAPCS},
- {RTLIB::UDIVREM_I16, "__rt_udiv", CallingConv::ARM_AAPCS},
{RTLIB::UDIVREM_I32, "__rt_udiv", CallingConv::ARM_AAPCS},
{RTLIB::UDIVREM_I64, "__rt_udiv64", CallingConv::ARM_AAPCS},
};
@@ -62,13 +57,8 @@ static void setARMLibcallNames(RuntimeLibcallsInfo &Info,
const Triple &TT) {
const char *const Name;
const CallingConv::ID CC;
} LibraryCalls[] = {
- {RTLIB::SDIVREM_I8, "__aeabi_idivmod", CallingConv::ARM_AAPCS},
- {RTLIB::SDIVREM_I16, "__aeabi_idivmod", CallingConv::ARM_AAPCS},
{RTLIB::SDIVREM_I32, "__aeabi_idivmod", CallingConv::ARM_AAPCS},
{RTLIB::SDIVREM_I64, "__aeabi_ldivmod", CallingConv::ARM_AAPCS},
-
- {RTLIB::UDIVREM_I8, "__aeabi_uidivmod", CallingConv::ARM_AAPCS},
- {RTLIB::UDIVREM_I16, "__aeabi_uidivmod", CallingConv::ARM_AAPCS},
{RTLIB::UDIVREM_I32, "__aeabi_uidivmod", CallingConv::ARM_AAPCS},
{RTLIB::UDIVREM_I64, "__aeabi_uldivmod", CallingConv::ARM_AAPCS},
};
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