https://github.com/SLTozer updated
https://github.com/llvm/llvm-project/pull/143593
>From eff0813afb187a5bba4f59d63120d9dd131a3a67 Mon Sep 17 00:00:00 2001
From: Stephen Tozer <stephen.to...@sony.com>
Date: Tue, 10 Jun 2025 20:02:21 +0100
Subject: [PATCH] [DLCov] Origin-Tracking: Handle origin-tracking elsewhere in
LLVM
---
llvm/include/llvm/IR/Instruction.h | 2 +-
llvm/lib/CodeGen/BranchFolding.cpp | 7 +++++++
llvm/lib/IR/Instruction.cpp | 2 +-
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/llvm/include/llvm/IR/Instruction.h
b/llvm/include/llvm/IR/Instruction.h
index 10fc9c1298607..1d22bdb0c3f43 100644
--- a/llvm/include/llvm/IR/Instruction.h
+++ b/llvm/include/llvm/IR/Instruction.h
@@ -507,7 +507,7 @@ class Instruction : public User,
LLVM_ABI bool extractProfTotalWeight(uint64_t &TotalVal) const;
/// Set the debug location information for this instruction.
- void setDebugLoc(DebugLoc Loc) { DbgLoc = std::move(Loc); }
+ void setDebugLoc(DebugLoc Loc) { DbgLoc = std::move(Loc).getCopied(); }
/// Return the debug location for this node as a DebugLoc.
const DebugLoc &getDebugLoc() const { return DbgLoc; }
diff --git a/llvm/lib/CodeGen/BranchFolding.cpp
b/llvm/lib/CodeGen/BranchFolding.cpp
index e0f7466ceacff..47fc0ec7549e0 100644
--- a/llvm/lib/CodeGen/BranchFolding.cpp
+++ b/llvm/lib/CodeGen/BranchFolding.cpp
@@ -42,6 +42,7 @@
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
+#include "llvm/Config/llvm-config.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/Function.h"
@@ -933,7 +934,13 @@ bool BranchFolder::TryTailMergeBlocks(MachineBasicBlock
*SuccBB,
// Sort by hash value so that blocks with identical end sequences sort
// together.
+#if LLVM_ENABLE_DEBUGLOC_ORIGIN_TRACKING
+ // If origin-tracking is enabled then MergePotentialElt is no longer a POD
+ // type, so we need std::sort instead.
+ std::sort(MergePotentials.begin(), MergePotentials.end());
+#else
array_pod_sort(MergePotentials.begin(), MergePotentials.end());
+#endif
// Walk through equivalence sets looking for actual exact matches.
while (MergePotentials.size() > 1) {
diff --git a/llvm/lib/IR/Instruction.cpp b/llvm/lib/IR/Instruction.cpp
index 109d516c61b7c..123bc7ecce01a 100644
--- a/llvm/lib/IR/Instruction.cpp
+++ b/llvm/lib/IR/Instruction.cpp
@@ -1375,7 +1375,7 @@ void Instruction::copyMetadata(const Instruction &SrcInst,
setMetadata(MD.first, MD.second);
}
if (WL.empty() || WLS.count(LLVMContext::MD_dbg))
- setDebugLoc(SrcInst.getDebugLoc());
+ setDebugLoc(SrcInst.getDebugLoc().getCopied());
}
Instruction *Instruction::clone() const {
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