================
@@ -0,0 +1,183 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s -check-prefix=V9
+; RUN: llc < %s -mtriple=sparcv9 -mattr=popc | FileCheck %s -check-prefix=POPC
+; RUN: llc < %s -mtriple=sparcv9 -mattr=vis3 | FileCheck %s -check-prefix=VIS3
+
+define i32 @i32_nopoison(i32 %x) nounwind {
+; V9-LABEL: i32_nopoison:
+; V9: ! %bb.0:
+; V9-NEXT: save %sp, -176, %sp
+; V9-NEXT: cmp %i0, 0
+; V9-NEXT: be %icc, .LBB0_2
+; V9-NEXT: nop
+; V9-NEXT: ! %bb.1: ! %cond.false
+; V9-NEXT: call __clzdi2
+; V9-NEXT: sllx %i0, 32, %o0
+; V9-NEXT: ret
+; V9-NEXT: restore %g0, %o0, %o0
+; V9-NEXT: .LBB0_2:
+; V9-NEXT: ret
+; V9-NEXT: restore %g0, 32, %o0
+;
+; POPC-LABEL: i32_nopoison:
+; POPC: ! %bb.0:
+; POPC-NEXT: cmp %o0, 0
+; POPC-NEXT: be %icc, .LBB0_2
+; POPC-NEXT: nop
+; POPC-NEXT: ! %bb.1: ! %cond.false
+; POPC-NEXT: srl %o0, 1, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: srl %o0, 2, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: srl %o0, 4, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: srl %o0, 8, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: srl %o0, 16, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: xor %o0, -1, %o0
+; POPC-NEXT: srl %o0, 0, %o0
+; POPC-NEXT: retl
+; POPC-NEXT: popc %o0, %o0
+; POPC-NEXT: .LBB0_2:
+; POPC-NEXT: retl
+; POPC-NEXT: mov 32, %o0
+;
+; VIS3-LABEL: i32_nopoison:
+; VIS3: ! %bb.0:
+; VIS3-NEXT: cmp %o0, 0
+; VIS3-NEXT: be %icc, .LBB0_2
+; VIS3-NEXT: nop
+; VIS3-NEXT: ! %bb.1: ! %cond.false
+; VIS3-NEXT: sllx %o0, 32, %o0
+; VIS3-NEXT: retl
+; VIS3-NEXT: lzcnt %o0, %o0
+; VIS3-NEXT: .LBB0_2:
+; VIS3-NEXT: retl
+; VIS3-NEXT: mov 32, %o0
+ %ret = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
+ ret i32 %ret
+}
+
+define i32 @i32_poison(i32 %x) nounwind {
+; V9-LABEL: i32_poison:
+; V9: ! %bb.0:
+; V9-NEXT: save %sp, -176, %sp
+; V9-NEXT: call __clzdi2
+; V9-NEXT: sllx %i0, 32, %o0
+; V9-NEXT: ret
+; V9-NEXT: restore %g0, %o0, %o0
+;
+; POPC-LABEL: i32_poison:
+; POPC: ! %bb.0:
+; POPC-NEXT: srl %o0, 1, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: srl %o0, 2, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: srl %o0, 4, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: srl %o0, 8, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: srl %o0, 16, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: xor %o0, -1, %o0
+; POPC-NEXT: srl %o0, 0, %o0
+; POPC-NEXT: retl
+; POPC-NEXT: popc %o0, %o0
+;
+; VIS3-LABEL: i32_poison:
+; VIS3: ! %bb.0:
+; VIS3-NEXT: sllx %o0, 32, %o0
+; VIS3-NEXT: retl
+; VIS3-NEXT: lzcnt %o0, %o0
+ %ret = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
+ ret i32 %ret
+}
+
+define i64 @i64_nopoison(i64 %x) nounwind {
+; V9-LABEL: i64_nopoison:
+; V9: ! %bb.0:
+; V9-NEXT: save %sp, -176, %sp
+; V9-NEXT: brz %i0, .LBB2_2
+; V9-NEXT: nop
+; V9-NEXT: ! %bb.1: ! %cond.false
+; V9-NEXT: call __clzdi2
+; V9-NEXT: mov %i0, %o0
+; V9-NEXT: ret
+; V9-NEXT: restore %g0, %o0, %o0
+; V9-NEXT: .LBB2_2:
+; V9-NEXT: ret
+; V9-NEXT: restore %g0, 64, %o0
+;
+; POPC-LABEL: i64_nopoison:
+; POPC: ! %bb.0:
+; POPC-NEXT: brz %o0, .LBB2_2
+; POPC-NEXT: nop
+; POPC-NEXT: ! %bb.1: ! %cond.false
+; POPC-NEXT: srlx %o0, 1, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: srlx %o0, 2, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: srlx %o0, 4, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: srlx %o0, 8, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: srlx %o0, 16, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: srlx %o0, 32, %o1
+; POPC-NEXT: or %o0, %o1, %o0
+; POPC-NEXT: xor %o0, -1, %o0
+; POPC-NEXT: retl
+; POPC-NEXT: popc %o0, %o0
+; POPC-NEXT: .LBB2_2:
+; POPC-NEXT: retl
+; POPC-NEXT: mov 64, %o0
+;
+; VIS3-LABEL: i64_nopoison:
+; VIS3: ! %bb.0:
+; VIS3-NEXT: brz %o0, .LBB2_2
----------------
s-barannikov wrote:
This is odd, I'd expect no branches here.
https://github.com/llvm/llvm-project/pull/135715
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