https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/130914
None
>From 9babf2e5212f37cf4953c153afaa8be69442d343 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <matthew.arsena...@amd.com>
Date: Wed, 12 Mar 2025 14:08:22 +0700
Subject: [PATCH] AMDGPU: Make sqrt and rsq intrinsics propagate poison
---
.../AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 2 ++
.../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 24 +++++++++++++++++++
2 files changed, 26 insertions(+)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index 6f6556365ebf6..5314738b2b8ac 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -548,6 +548,8 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
case Intrinsic::amdgcn_sqrt:
case Intrinsic::amdgcn_rsq: {
Value *Src = II.getArgOperand(0);
+ if (isa<PoisonValue>(Src))
+ return IC.replaceInstUsesWith(II, Src);
// TODO: Move to ConstantFolding/InstSimplify?
if (isa<UndefValue>(Src)) {
diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
index 42ddc71dab848..fca3860240294 100644
--- a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+++ b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
@@ -89,6 +89,14 @@ declare half @llvm.amdgcn.sqrt.f16(half) nounwind readnone
declare float @llvm.amdgcn.sqrt.f32(float) nounwind readnone
declare double @llvm.amdgcn.sqrt.f64(double) nounwind readnone
+define half @test_constant_fold_sqrt_f16_poison() nounwind {
+; CHECK-LABEL: @test_constant_fold_sqrt_f16_poison(
+; CHECK-NEXT: ret half poison
+;
+ %val = call half @llvm.amdgcn.sqrt.f16(half poison) nounwind readnone
+ ret half %val
+}
+
define half @test_constant_fold_sqrt_f16_undef() nounwind {
; CHECK-LABEL: @test_constant_fold_sqrt_f16_undef(
; CHECK-NEXT: ret half 0xH7E00
@@ -97,6 +105,14 @@ define half @test_constant_fold_sqrt_f16_undef() nounwind {
ret half %val
}
+define float @test_constant_fold_sqrt_f32_poison() nounwind {
+; CHECK-LABEL: @test_constant_fold_sqrt_f32_poison(
+; CHECK-NEXT: ret float poison
+;
+ %val = call float @llvm.amdgcn.sqrt.f32(float poison) nounwind readnone
+ ret float %val
+}
+
define float @test_constant_fold_sqrt_f32_undef() nounwind {
; CHECK-LABEL: @test_constant_fold_sqrt_f32_undef(
; CHECK-NEXT: ret float 0x7FF8000000000000
@@ -234,6 +250,14 @@ define double @test_amdgcn_sqrt_f64(double %arg) {
declare float @llvm.amdgcn.rsq.f32(float) nounwind readnone
+define float @test_constant_fold_rsq_f32_poison() nounwind {
+; CHECK-LABEL: @test_constant_fold_rsq_f32_poison(
+; CHECK-NEXT: ret float poison
+;
+ %val = call float @llvm.amdgcn.rsq.f32(float poison) nounwind readnone
+ ret float %val
+}
+
define float @test_constant_fold_rsq_f32_undef() nounwind {
; CHECK-LABEL: @test_constant_fold_rsq_f32_undef(
; CHECK-NEXT: ret float 0x7FF8000000000000
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