================ @@ -228,6 +229,66 @@ bool DivergenceLoweringHelper::lowerTemporalDivergence() { return false; } +bool DivergenceLoweringHelper::lowerTemporalDivergenceI1() { + MachineRegisterInfo::VRegAttrs BoolS1 = {ST->getBoolRC(), LLT::scalar(1)}; + initializeLaneMaskRegisterAttributes(BoolS1); + MachineSSAUpdater SSAUpdater(*MF); + + // In case of use outside muliple nested cycles or muliple uses we only need + // to merge lane mask across largest relevant cycle. + SmallDenseMap<Register, std::pair<const MachineCycle *, Register>> LRCCache; + for (auto [Reg, UseInst, LRC] : MUI->getTemporalDivergenceList()) { + if (MRI->getType(Reg) != LLT::scalar(1)) + continue; + + const MachineCycle *CachedLRC = LRCCache.lookup(Reg).first; + if (CachedLRC) { + LRC = CachedLRC->contains(LRC) ? CachedLRC : LRC; + assert(LRC->contains(CachedLRC)); + } + + LRCCache[Reg] = {LRC, {}}; + } + + for (auto LRCIter : LRCCache) { ---------------- nhaehnle wrote:
Naming: this isn't an iterator, a more accurate generic name would be just "Entry" (or LRCCacheEntry, but that's long) https://github.com/llvm/llvm-project/pull/124299 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits