Author: Craig Topper Date: 2025-02-28T14:49:49-08:00 New Revision: f2cad4a242ebe98122c5667d24aca8c80d2e0de4
URL: https://github.com/llvm/llvm-project/commit/f2cad4a242ebe98122c5667d24aca8c80d2e0de4 DIFF: https://github.com/llvm/llvm-project/commit/f2cad4a242ebe98122c5667d24aca8c80d2e0de4.diff LOG: Revert "[RISCV] Simplify getStackAdjBase. NFC (#129281)" This reverts commit 22965dc5f9c72d6b411458d4115e05a310d619eb. Added: Modified: llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h Removed: ################################################################################ diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h index b2b604ff83719..8175431f99e32 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h @@ -629,13 +629,49 @@ inline unsigned encodeRlist(MCRegister EndReg, bool IsRV32E = false) { inline static unsigned getStackAdjBase(unsigned RlistVal, bool IsRV64) { assert(RlistVal != RLISTENCODE::INVALID_RLIST && "{ra, s0-s10} is not supported, s11 must be included."); - unsigned NumRegs = (RlistVal - RLISTENCODE::RA) + 1; - // s10 and s11 are saved together. - if (RlistVal == RLISTENCODE::RA_S0_S11) - ++NumRegs; - - unsigned RegSize = IsRV64 ? 8 : 4; - return alignTo(NumRegs * RegSize, 16); + if (!IsRV64) { + switch (RlistVal) { + case RLISTENCODE::RA: + case RLISTENCODE::RA_S0: + case RLISTENCODE::RA_S0_S1: + case RLISTENCODE::RA_S0_S2: + return 16; + case RLISTENCODE::RA_S0_S3: + case RLISTENCODE::RA_S0_S4: + case RLISTENCODE::RA_S0_S5: + case RLISTENCODE::RA_S0_S6: + return 32; + case RLISTENCODE::RA_S0_S7: + case RLISTENCODE::RA_S0_S8: + case RLISTENCODE::RA_S0_S9: + return 48; + case RLISTENCODE::RA_S0_S11: + return 64; + } + } else { + switch (RlistVal) { + case RLISTENCODE::RA: + case RLISTENCODE::RA_S0: + return 16; + case RLISTENCODE::RA_S0_S1: + case RLISTENCODE::RA_S0_S2: + return 32; + case RLISTENCODE::RA_S0_S3: + case RLISTENCODE::RA_S0_S4: + return 48; + case RLISTENCODE::RA_S0_S5: + case RLISTENCODE::RA_S0_S6: + return 64; + case RLISTENCODE::RA_S0_S7: + case RLISTENCODE::RA_S0_S8: + return 80; + case RLISTENCODE::RA_S0_S9: + return 96; + case RLISTENCODE::RA_S0_S11: + return 112; + } + } + llvm_unreachable("Unexpected RlistVal"); } void printRlist(unsigned SlistEncode, raw_ostream &OS); _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
