================ @@ -1015,8 +1063,20 @@ void LoongArch::finalizeRelax(int passes) const { r.expr = r.sym->hasFlag(NEEDS_PLT) ? R_PLT_PC : R_PC; break; case R_LARCH_B26: + case R_LARCH_TLS_LE_LO12_R: + skip = 4; + write32le(p, aux.writes[writesIdx++]); + break; + case R_LARCH_TLS_GD_PCREL20_S2: + // Note: R_LARCH_TLS_LD_PCREL20_S2 must also use R_TLSGD_PC instead + // of R_TLSLD_PC because the processing of relocation + // R_LARCH_TLS_LD_PC_HI20 is the same as R_LARCH_TLS_GD_PC_HI20. If ---------------- ylzsx wrote:
Thanks for your review. I will revise it to the following description. Do you think it is clear? ``` Note: R_LARCH_TLS_LD_PCREL20_S2 must also use R_TLSGD_PC instead of R_TLSLD_PC due to historical reasons. In fact, TLSLD is not fully supported on LoongArch. We need to handle relocation of R_LARCH_TLS_LD_PC_HI20 as equivalent to R_LARCH_TLS_GD_PC_HI20. This reason has also been mentioned in mold commit: https://github.com/rui314/mold/commit/5dfa1cf07c03bd57cb3d493b652ef22441bcd71c ``` https://github.com/llvm/llvm-project/pull/123600 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits