llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-aarch64 @llvm/pr-subscribers-mc Author: None (llvmbot) <details> <summary>Changes</summary> Backport d44d806 Requested by: @<!-- -->kmclaughlin-arm --- Full diff: https://github.com/llvm/llvm-project/pull/127084.diff 4 Files Affected: - (modified) llvm/lib/Target/AArch64/AArch64InstrFormats.td (+8-15) - (modified) llvm/lib/Target/AArch64/AArch64InstrInfo.td (-23) - (modified) llvm/test/MC/AArch64/armv8.1a-lse.s (+2) - (modified) llvm/test/MC/AArch64/armv9.6a-lsui.s (+12-90) ``````````diff diff --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td index 3bb5d3cb4d09d..c2eea836fb14f 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td +++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td @@ -12529,26 +12529,19 @@ multiclass STOPregister<string asm, string instr> { !cast<Instruction>(instr # "X")>; } +let Predicates = [HasLSUI] in class BaseSTOPregisterLSUI<string asm, RegisterClass OP, Register Reg, Instruction inst> : - InstAlias<asm # "\t$Rs, [$Rn]", (inst Reg, OP:$Rs, GPR64sp:$Rn)>; + InstAlias<asm # "\t$Rs, [$Rn]", (inst Reg, OP:$Rs, GPR64sp:$Rn), 0>; multiclass STOPregisterLSUI<string asm, string instr> { - def : BaseSTOPregisterLSUI<asm # "a", GPR32, WZR, - !cast<Instruction>(instr # "W")>; - def : BaseSTOPregisterLSUI<asm # "a", GPR64, XZR, - !cast<Instruction>(instr # "X")>; - def : BaseSTOPregisterLSUI<asm # "l", GPR32, WZR, - !cast<Instruction>(instr # "W")>; - def : BaseSTOPregisterLSUI<asm # "l", GPR64, XZR, - !cast<Instruction>(instr # "X")>; - def : BaseSTOPregisterLSUI<asm # "al", GPR32, WZR, - !cast<Instruction>(instr # "W")>; - def : BaseSTOPregisterLSUI<asm # "al", GPR64, XZR, - !cast<Instruction>(instr # "X")>; - def : BaseSTOPregisterLSUI<asm, GPR32, WZR, + def : BaseSTOPregisterLSUI<asm # "l", GPR32, WZR, + !cast<Instruction>(instr # "LW")>; + def : BaseSTOPregisterLSUI<asm # "l", GPR64, XZR, + !cast<Instruction>(instr # "LX")>; + def : BaseSTOPregisterLSUI<asm, GPR32, WZR, !cast<Instruction>(instr # "W")>; - def : BaseSTOPregisterLSUI<asm, GPR64, XZR, + def : BaseSTOPregisterLSUI<asm, GPR64, XZR, !cast<Instruction>(instr # "X")>; } diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td index b77246200db64..a3a607825c7f6 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -2667,21 +2667,11 @@ defm CASLT : CompareAndSwapUnprivileged<0b11, 0, 1, "l">; defm CASAT : CompareAndSwapUnprivileged<0b11, 1, 0, "a">; defm CASALT : CompareAndSwapUnprivileged<0b11, 1, 1, "al">; -def : MnemonicAlias<"cas", "cast">; -def : MnemonicAlias<"casl", "caslt">; -def : MnemonicAlias<"casa", "casat">; -def : MnemonicAlias<"casal", "casalt">; - // v9.6-a atomic CASPT defm CASPT : CompareAndSwapPairUnprivileged<0b01, 0, 0, "">; defm CASPLT : CompareAndSwapPairUnprivileged<0b01, 0, 1, "l">; defm CASPAT : CompareAndSwapPairUnprivileged<0b01, 1, 0, "a">; defm CASPALT : CompareAndSwapPairUnprivileged<0b01, 1, 1, "al">; - -def : MnemonicAlias<"casp", "caspt">; -def : MnemonicAlias<"caspl", "casplt">; -def : MnemonicAlias<"caspa", "caspat">; -def : MnemonicAlias<"caspal", "caspalt">; } // v8.1 atomic SWP @@ -2696,11 +2686,6 @@ let Predicates = [HasLSUI] in { defm SWPTA : SwapLSUI<1, 0, "a">; defm SWPTL : SwapLSUI<0, 1, "l">; defm SWPTAL : SwapLSUI<1, 1, "al">; - - def : MnemonicAlias<"swp", "swpt">; - def : MnemonicAlias<"swpa", "swpta">; - def : MnemonicAlias<"swpl", "swptl">; - def : MnemonicAlias<"swpal", "swptal">; } // v9.6-a unprivileged atomic LD<OP> (FEAT_LSUI) @@ -4865,22 +4850,14 @@ let Predicates = [HasLSUI] in { defm LDTXRW : LoadUnprivilegedLSUI<0b10, GPR32, "ldtxr">; defm LDTXRX : LoadUnprivilegedLSUI<0b11, GPR64, "ldtxr">; -def : MnemonicAlias<"ldxr", "ldtxr">; - def LDATXRW : LoadExclusiveLSUI <0b10, 1, 1, GPR32, "ldatxr">; def LDATXRX : LoadExclusiveLSUI <0b11, 1, 1, GPR64, "ldatxr">; -def : MnemonicAlias<"ldaxr", "ldatxr">; - defm STTXRW : StoreUnprivilegedLSUI<0b10, GPR32, "sttxr">; defm STTXRX : StoreUnprivilegedLSUI<0b11, GPR64, "sttxr">; -def : MnemonicAlias<"stxr", "sttxr">; - def STLTXRW : StoreExclusiveLSUI<0b10, 0, 1, GPR32, "stltxr">; def STLTXRX : StoreExclusiveLSUI<0b11, 0, 1, GPR64, "stltxr">; - -def : MnemonicAlias<"stlxr", "stltxr">; } //===----------------------------------------------------------------------===// diff --git a/llvm/test/MC/AArch64/armv8.1a-lse.s b/llvm/test/MC/AArch64/armv8.1a-lse.s index b5bbbe66c6ae2..eb9a30dea9e6b 100644 --- a/llvm/test/MC/AArch64/armv8.1a-lse.s +++ b/llvm/test/MC/AArch64/armv8.1a-lse.s @@ -7,6 +7,8 @@ // RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=tsv110 -show-encoding < %s 2> %t | FileCheck %s // RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s // RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r -show-encoding < %s 2> %t | FileCheck %s +// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a,+lse,+lsui -show-encoding < %s 2> %t | FileCheck %s // RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s .text diff --git a/llvm/test/MC/AArch64/armv9.6a-lsui.s b/llvm/test/MC/AArch64/armv9.6a-lsui.s index b48db1f9b5570..d4a5e1f980560 100644 --- a/llvm/test/MC/AArch64/armv9.6a-lsui.s +++ b/llvm/test/MC/AArch64/armv9.6a-lsui.s @@ -313,42 +313,16 @@ _func: // ERROR: instruction requires: lsui sttaddl w0, [x2] -// CHECK: ldtadd w0, wzr, [x2] // encoding: [0x5f,0x04,0x20,0x19] +// CHECK: ldtaddl w0, wzr, [x2] // encoding: [0x5f,0x04,0x60,0x19] // ERROR: instruction requires: lsui sttaddl w2, [sp] -// CHECK: ldtadd w2, wzr, [sp] // encoding: [0xff,0x07,0x22,0x19] +// CHECK: ldtaddl w2, wzr, [sp] // encoding: [0xff,0x07,0x62,0x19] // ERROR: instruction requires: lsui sttaddl x0, [x2] -// CHECK: ldtadd x0, xzr, [x2] // encoding: [0x5f,0x04,0x20,0x59] +// CHECK: ldtaddl x0, xzr, [x2] // encoding: [0x5f,0x04,0x60,0x59] // ERROR: instruction requires: lsui sttaddl x2, [sp] -// CHECK: ldtadd x2, xzr, [sp] // encoding: [0xff,0x07,0x22,0x59] -// ERROR: instruction requires: lsui - - sttadda w0, [x2] -// CHECK: ldtadd w0, wzr, [x2] // encoding: [0x5f,0x04,0x20,0x19] -// ERROR: instruction requires: lsui - sttadda w2, [sp] -// CHECK: ldtadd w2, wzr, [sp] // encoding: [0xff,0x07,0x22,0x19] -// ERROR: instruction requires: lsui - sttadda x0, [x2] -// CHECK: ldtadd x0, xzr, [x2] // encoding: [0x5f,0x04,0x20,0x59] -// ERROR: instruction requires: lsui - sttadda x2, [sp] -// CHECK: ldtadd x2, xzr, [sp] // encoding: [0xff,0x07,0x22,0x59] -// ERROR: instruction requires: lsui - - sttaddal w0, [x2] -// CHECK: ldtadd w0, wzr, [x2] // encoding: [0x5f,0x04,0x20,0x19] -// ERROR: instruction requires: lsui - sttaddal w2, [sp] -// CHECK: ldtadd w2, wzr, [sp] // encoding: [0xff,0x07,0x22,0x19] -// ERROR: instruction requires: lsui - sttaddal x0, [x2] -// CHECK: ldtadd x0, xzr, [x2] // encoding: [0x5f,0x04,0x20,0x59] -// ERROR: instruction requires: lsui - sttaddal x2, [sp] -// CHECK: ldtadd x2, xzr, [sp] // encoding: [0xff,0x07,0x22,0x59] +// CHECK: ldtaddl x2, xzr, [sp] // encoding: [0xff,0x07,0x62,0x59] // ERROR: instruction requires: lsui sttclr w0, [x2] @@ -362,45 +336,19 @@ _func: // ERROR: instruction requires: lsui sttclr x2, [sp] // CHECK: ldtclr x2, xzr, [sp] // encoding: [0xff,0x17,0x22,0x59] -// ERROR: instruction requires: lsui - - sttclra w0, [x2] -// CHECK: ldtclr w0, wzr, [x2] // encoding: [0x5f,0x14,0x20,0x19] -// ERROR: instruction requires: lsui - sttclra w2, [sp] -// CHECK: ldtclr w2, wzr, [sp] // encoding: [0xff,0x17,0x22,0x19] -// ERROR: instruction requires: lsui - sttclra x0, [x2] -// CHECK: ldtclr x0, xzr, [x2] // encoding: [0x5f,0x14,0x20,0x59] -// ERROR: instruction requires: lsui - sttclra x2, [sp] -// CHECK: ldtclr x2, xzr, [sp] // encoding: [0xff,0x17,0x22,0x59] // ERROR: instruction requires: lsui sttclrl w0, [x2] -// CHECK: ldtclr w0, wzr, [x2] // encoding: [0x5f,0x14,0x20,0x19] +// CHECK: ldtclrl w0, wzr, [x2] // encoding: [0x5f,0x14,0x60,0x19] // ERROR: instruction requires: lsui sttclrl w2, [sp] -// CHECK: ldtclr w2, wzr, [sp] // encoding: [0xff,0x17,0x22,0x19] +// CHECK: ldtclrl w2, wzr, [sp] // encoding: [0xff,0x17,0x62,0x19] // ERROR: instruction requires: lsui sttclrl x0, [x2] -// CHECK: ldtclr x0, xzr, [x2] // encoding: [0x5f,0x14,0x20,0x59] +// CHECK: ldtclrl x0, xzr, [x2] // encoding: [0x5f,0x14,0x60,0x59] // ERROR: instruction requires: lsui sttclrl x2, [sp] -// CHECK: ldtclr x2, xzr, [sp] // encoding: [0xff,0x17,0x22,0x59] -// ERROR: instruction requires: lsui - - sttclral w0, [x2] -// CHECK: ldtclr w0, wzr, [x2] // encoding: [0x5f,0x14,0x20,0x19] -// ERROR: instruction requires: lsui - sttclral x2, [sp] -// CHECK: ldtclr x2, xzr, [sp] // encoding: [0xff,0x17,0x22,0x59] -// ERROR: instruction requires: lsui - sttclral x0, [x2] -// CHECK: ldtclr x0, xzr, [x2] // encoding: [0x5f,0x14,0x20,0x59] -// ERROR: instruction requires: lsui - sttclral x2, [sp] -// CHECK: ldtclr x2, xzr, [sp] // encoding: [0xff,0x17,0x22,0x59] +// CHECK: ldtclrl x2, xzr, [sp] // encoding: [0xff,0x17,0x62,0x59] // ERROR: instruction requires: lsui sttset w0, [x2] @@ -414,45 +362,19 @@ _func: // ERROR: instruction requires: lsui sttset x2, [sp] // CHECK: ldtset x2, xzr, [sp] // encoding: [0xff,0x37,0x22,0x59] -// ERROR: instruction requires: lsui - - sttseta w0, [x2] -// CHECK: ldtset w0, wzr, [x2] // encoding: [0x5f,0x34,0x20,0x19] -// ERROR: instruction requires: lsui - sttseta w2, [sp] -// CHECK: ldtset w2, wzr, [sp] // encoding: [0xff,0x37,0x22,0x19] -// ERROR: instruction requires: lsui - sttseta x0, [x2] -// CHECK: ldtset x0, xzr, [x2] // encoding: [0x5f,0x34,0x20,0x59] -// ERROR: instruction requires: lsui - sttseta x2, [sp] -// CHECK: ldtset x2, xzr, [sp] // encoding: [0xff,0x37,0x22,0x59] // ERROR: instruction requires: lsui sttsetl w0, [x2] -// CHECK: ldtset w0, wzr, [x2] // encoding: [0x5f,0x34,0x20,0x19] +// CHECK: ldtsetl w0, wzr, [x2] // encoding: [0x5f,0x34,0x60,0x19] // ERROR: instruction requires: lsui sttsetl w2, [sp] -// CHECK: ldtset w2, wzr, [sp] // encoding: [0xff,0x37,0x22,0x19] +// CHECK: ldtsetl w2, wzr, [sp] // encoding: [0xff,0x37,0x62,0x19] // ERROR: instruction requires: lsui sttsetl x0, [x2] -// CHECK: ldtset x0, xzr, [x2] // encoding: [0x5f,0x34,0x20,0x59] +// CHECK: ldtsetl x0, xzr, [x2] // encoding: [0x5f,0x34,0x60,0x59] // ERROR: instruction requires: lsui sttsetl x2, [sp] -// CHECK: ldtset x2, xzr, [sp] // encoding: [0xff,0x37,0x22,0x59] -// ERROR: instruction requires: lsui - - sttsetal w0, [x2] -// CHECK: ldtset w0, wzr, [x2] // encoding: [0x5f,0x34,0x20,0x19] -// ERROR: instruction requires: lsui - sttsetal x2, [sp] -// CHECK: ldtset x2, xzr, [sp] // encoding: [0xff,0x37,0x22,0x59] -// ERROR: instruction requires: lsui - sttsetal x0, [x2] -// CHECK: ldtset x0, xzr, [x2] // encoding: [0x5f,0x34,0x20,0x59] -// ERROR: instruction requires: lsui - sttsetal x2, [sp] -// CHECK: ldtset x2, xzr, [sp] // encoding: [0xff,0x37,0x22,0x59] +// CHECK: ldtsetl x2, xzr, [sp] // encoding: [0xff,0x37,0x62,0x59] // ERROR: instruction requires: lsui //------------------------------------------------------------------------------ `````````` </details> https://github.com/llvm/llvm-project/pull/127084 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
