https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/124698
>From c0ee13ef034bbb4d385dcb4ebdbae9ee6b169b1b Mon Sep 17 00:00:00 2001 From: Akshat Oke <akshat....@amd.com> Date: Tue, 28 Jan 2025 05:16:57 +0000 Subject: [PATCH 1/3] [CodeGen][NewPM] Port RegisterCoalescer to NPM --- .../llvm/CodeGen/RegisterCoalescerPass.h | 28 ++++++++ llvm/include/llvm/InitializePasses.h | 2 +- llvm/include/llvm/Passes/CodeGenPassBuilder.h | 1 + .../llvm/Passes/MachinePassRegistry.def | 2 +- llvm/lib/CodeGen/CodeGen.cpp | 2 +- llvm/lib/CodeGen/RegAllocBasic.cpp | 2 +- llvm/lib/CodeGen/RegAllocGreedy.cpp | 2 +- llvm/lib/CodeGen/RegisterCoalescer.cpp | 71 +++++++++++++++---- llvm/lib/CodeGen/RegisterCoalescer.h | 1 + llvm/lib/Passes/PassBuilder.cpp | 1 + .../coalescer-drop-subreg-to-reg-imm-ops.mir | 1 + ...oalescer-verifier-error-empty-subrange.mir | 1 + llvm/test/CodeGen/X86/coalesce-dead-lanes.mir | 1 + llvm/test/CodeGen/X86/late-remat-update.mir | 2 +- 14 files changed, 96 insertions(+), 21 deletions(-) create mode 100644 llvm/include/llvm/CodeGen/RegisterCoalescerPass.h diff --git a/llvm/include/llvm/CodeGen/RegisterCoalescerPass.h b/llvm/include/llvm/CodeGen/RegisterCoalescerPass.h new file mode 100644 index 000000000000000..91f66dbf33b5f43 --- /dev/null +++ b/llvm/include/llvm/CodeGen/RegisterCoalescerPass.h @@ -0,0 +1,28 @@ +//===- llvm/CodeGen/RegisterCoalescerPass.h ---------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CODEGEN_REGISTER_COALESCERPASS_H +#define LLVM_CODEGEN_REGISTER_COALESCERPASS_H + +#include "llvm/CodeGen/MachinePassManager.h" + +namespace llvm { +class RegisterCoalescerPass : public PassInfoMixin<RegisterCoalescerPass> { +public: + PreservedAnalyses run(MachineFunction &MF, + MachineFunctionAnalysisManager &MFAM); + + MachineFunctionProperties getClearedProperties() const { + return MachineFunctionProperties().set( + MachineFunctionProperties::Property::IsSSA); + } +}; + +} // namespace llvm + +#endif // LLVM_CODEGEN_REGISTER_COALESCERPASS_H diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h index 8111afcc1fb20fe..46fcd17347f4e03 100644 --- a/llvm/include/llvm/InitializePasses.h +++ b/llvm/include/llvm/InitializePasses.h @@ -266,7 +266,7 @@ void initializeRegionOnlyPrinterPass(PassRegistry &); void initializeRegionOnlyViewerPass(PassRegistry &); void initializeRegionPrinterPass(PassRegistry &); void initializeRegionViewerPass(PassRegistry &); -void initializeRegisterCoalescerPass(PassRegistry &); +void initializeRegisterCoalescerLegacyPass(PassRegistry &); void initializeRemoveLoadsIntoFakeUsesPass(PassRegistry &); void initializeRemoveRedundantDebugValuesPass(PassRegistry &); void initializeRenameIndependentSubregsPass(PassRegistry &); diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h index a84164bed46ceca..9681368249a0f95 100644 --- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h +++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h @@ -57,6 +57,7 @@ #include "llvm/CodeGen/RegAllocFast.h" #include "llvm/CodeGen/RegUsageInfoCollector.h" #include "llvm/CodeGen/RegUsageInfoPropagate.h" +#include "llvm/CodeGen/RegisterCoalescerPass.h" #include "llvm/CodeGen/RegisterUsageInfo.h" #include "llvm/CodeGen/ReplaceWithVeclib.h" #include "llvm/CodeGen/SafeStack.h" diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def index dfe3514360c3c50..1d978f2ea312286 100644 --- a/llvm/include/llvm/Passes/MachinePassRegistry.def +++ b/llvm/include/llvm/Passes/MachinePassRegistry.def @@ -164,6 +164,7 @@ MACHINE_FUNCTION_PASS("print<slot-indexes>", SlotIndexesPrinterPass(errs())) MACHINE_FUNCTION_PASS("print<virtregmap>", VirtRegMapPrinterPass(errs())) MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass()) MACHINE_FUNCTION_PASS("reg-usage-propagation", RegUsageInfoPropagationPass()) +MACHINE_FUNCTION_PASS("register-coalescer", RegisterCoalescerPass()) MACHINE_FUNCTION_PASS("require-all-machine-function-properties", RequireAllMachineFunctionPropertiesPass()) MACHINE_FUNCTION_PASS("stack-coloring", StackColoringPass()) @@ -265,7 +266,6 @@ DUMMY_MACHINE_FUNCTION_PASS("removeredundantdebugvalues", RemoveRedundantDebugVa DUMMY_MACHINE_FUNCTION_PASS("rename-independent-subregs", RenameIndependentSubregsPass) DUMMY_MACHINE_FUNCTION_PASS("reset-machine-function", ResetMachineFunctionPass) DUMMY_MACHINE_FUNCTION_PASS("shrink-wrap", ShrinkWrapPass) -DUMMY_MACHINE_FUNCTION_PASS("simple-register-coalescing", RegisterCoalescerPass) DUMMY_MACHINE_FUNCTION_PASS("stack-frame-layout", StackFrameLayoutAnalysisPass) DUMMY_MACHINE_FUNCTION_PASS("stack-slot-coloring", StackSlotColoringPass) DUMMY_MACHINE_FUNCTION_PASS("stackmap-liveness", StackMapLivenessPass) diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp index ed871519e33bc2c..5f0c7ec9c8d0187 100644 --- a/llvm/lib/CodeGen/CodeGen.cpp +++ b/llvm/lib/CodeGen/CodeGen.cpp @@ -116,7 +116,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) { initializeRegAllocFastPass(Registry); initializeRegUsageInfoCollectorLegacyPass(Registry); initializeRegUsageInfoPropagationLegacyPass(Registry); - initializeRegisterCoalescerPass(Registry); + initializeRegisterCoalescerLegacyPass(Registry); initializeRemoveLoadsIntoFakeUsesPass(Registry); initializeRemoveRedundantDebugValuesPass(Registry); initializeRenameIndependentSubregsPass(Registry); diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp index f3f34f890be11ed..e1f05406297d2d2 100644 --- a/llvm/lib/CodeGen/RegAllocBasic.cpp +++ b/llvm/lib/CodeGen/RegAllocBasic.cpp @@ -134,7 +134,7 @@ INITIALIZE_PASS_BEGIN(RABasic, "regallocbasic", "Basic Register Allocator", INITIALIZE_PASS_DEPENDENCY(LiveDebugVariablesWrapperLegacy) INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass) INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass) -INITIALIZE_PASS_DEPENDENCY(RegisterCoalescer) +INITIALIZE_PASS_DEPENDENCY(RegisterCoalescerLegacy) INITIALIZE_PASS_DEPENDENCY(MachineScheduler) INITIALIZE_PASS_DEPENDENCY(LiveStacksWrapperLegacy) INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass) diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp index 6077cfd514de279..465c4e8feffbb6e 100644 --- a/llvm/lib/CodeGen/RegAllocGreedy.cpp +++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp @@ -154,7 +154,7 @@ INITIALIZE_PASS_BEGIN(RAGreedy, "greedy", INITIALIZE_PASS_DEPENDENCY(LiveDebugVariablesWrapperLegacy) INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass) INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass) -INITIALIZE_PASS_DEPENDENCY(RegisterCoalescer) +INITIALIZE_PASS_DEPENDENCY(RegisterCoalescerLegacy) INITIALIZE_PASS_DEPENDENCY(MachineScheduler) INITIALIZE_PASS_DEPENDENCY(LiveStacksWrapperLegacy) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp index d2f7684ec83a48f..4a8fbc2c69ce2e5 100644 --- a/llvm/lib/CodeGen/RegisterCoalescer.cpp +++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp @@ -24,15 +24,18 @@ #include "llvm/CodeGen/LiveIntervals.h" #include "llvm/CodeGen/LiveRangeEdit.h" #include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineDominators.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineLoopInfo.h" #include "llvm/CodeGen/MachineOperand.h" +#include "llvm/CodeGen/MachinePassManager.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/RegisterClassInfo.h" +#include "llvm/CodeGen/RegisterCoalescerPass.h" #include "llvm/CodeGen/SlotIndexes.h" #include "llvm/CodeGen/TargetInstrInfo.h" #include "llvm/CodeGen/TargetOpcodes.h" @@ -121,13 +124,13 @@ namespace { class JoinVals; -class RegisterCoalescer : public MachineFunctionPass, - private LiveRangeEdit::Delegate { +class RegisterCoalescer : private LiveRangeEdit::Delegate { MachineFunction *MF = nullptr; MachineRegisterInfo *MRI = nullptr; const TargetRegisterInfo *TRI = nullptr; const TargetInstrInfo *TII = nullptr; LiveIntervals *LIS = nullptr; + SlotIndexes *SI = nullptr; const MachineLoopInfo *Loops = nullptr; RegisterClassInfo RegClassInfo; @@ -372,11 +375,23 @@ class RegisterCoalescer : public MachineFunctionPass, void checkMergingChangesDbgValuesImpl(Register Reg, LiveRange &OtherRange, LiveRange &RegRange, JoinVals &Vals2); +public: + RegisterCoalescer(LiveIntervals *LIS, SlotIndexes *SI, + const MachineLoopInfo *Loops) + : LIS(LIS), SI(SI), Loops(Loops) {} + + void releaseMemory(); + bool run(MachineFunction &MF); +}; + +class RegisterCoalescerLegacy : public MachineFunctionPass { + std::unique_ptr<RegisterCoalescer> Impl; + public: static char ID; ///< Class identification, replacement for typeinfo - RegisterCoalescer() : MachineFunctionPass(ID) { - initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry()); + RegisterCoalescerLegacy() : MachineFunctionPass(ID) { + initializeRegisterCoalescerLegacyPass(*PassRegistry::getPassRegistry()); } void getAnalysisUsage(AnalysisUsage &AU) const override; @@ -386,7 +401,7 @@ class RegisterCoalescer : public MachineFunctionPass, MachineFunctionProperties::Property::IsSSA); } - void releaseMemory() override; + void releaseMemory() override { Impl->releaseMemory(); } /// This is the pass entry point. bool runOnMachineFunction(MachineFunction &) override; @@ -394,16 +409,16 @@ class RegisterCoalescer : public MachineFunctionPass, } // end anonymous namespace -char RegisterCoalescer::ID = 0; +char RegisterCoalescerLegacy::ID = 0; -char &llvm::RegisterCoalescerID = RegisterCoalescer::ID; +char &llvm::RegisterCoalescerID = RegisterCoalescerLegacy::ID; -INITIALIZE_PASS_BEGIN(RegisterCoalescer, "register-coalescer", +INITIALIZE_PASS_BEGIN(RegisterCoalescerLegacy, "register-coalescer", "Register Coalescer", false, false) INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass) INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass) INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass) -INITIALIZE_PASS_END(RegisterCoalescer, "register-coalescer", +INITIALIZE_PASS_END(RegisterCoalescerLegacy, "register-coalescer", "Register Coalescer", false, false) [[nodiscard]] static bool isMoveInstr(const TargetRegisterInfo &tri, @@ -580,8 +595,9 @@ bool CoalescerPair::isCoalescable(const MachineInstr *MI) const { } } -void RegisterCoalescer::getAnalysisUsage(AnalysisUsage &AU) const { +void RegisterCoalescerLegacy::getAnalysisUsage(AnalysisUsage &AU) const { AU.setPreservesCFG(); + AU.addUsedIfAvailable<SlotIndexesWrapperPass>(); AU.addRequired<LiveIntervalsWrapperPass>(); AU.addPreserved<LiveIntervalsWrapperPass>(); AU.addPreserved<SlotIndexesWrapperPass>(); @@ -4234,7 +4250,33 @@ void RegisterCoalescer::releaseMemory() { LargeLIVisitCounter.clear(); } -bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) { +PreservedAnalyses +RegisterCoalescerPass::run(MachineFunction &MF, + MachineFunctionAnalysisManager &MFAM) { + auto &LIS = MFAM.getResult<LiveIntervalsAnalysis>(MF); + auto &Loops = MFAM.getResult<MachineLoopAnalysis>(MF); + auto *SI = MFAM.getCachedResult<SlotIndexesAnalysis>(MF); + RegisterCoalescer Impl(&LIS, SI, &Loops); + if (!Impl.run(MF)) + return PreservedAnalyses::all(); + auto PA = getMachineFunctionPassPreservedAnalyses(); + PA.preserve<LiveIntervalsAnalysis>(); + PA.preserve<SlotIndexesAnalysis>(); + PA.preserve<MachineLoopAnalysis>(); + PA.preserve<MachineDominatorTreeAnalysis>(); + return PA; +} + +bool RegisterCoalescerLegacy::runOnMachineFunction(MachineFunction &MF) { + auto *LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS(); + auto *Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI(); + auto *SIWrapper = getAnalysisIfAvailable<SlotIndexesWrapperPass>(); + SlotIndexes *SI = SIWrapper ? &SIWrapper->getSI() : nullptr; + Impl.reset(new RegisterCoalescer(LIS, SI, Loops)); + return Impl->run(MF); +} + +bool RegisterCoalescer::run(MachineFunction &fn) { LLVM_DEBUG(dbgs() << "********** REGISTER COALESCER **********\n" << "********** Function: " << fn.getName() << '\n'); @@ -4257,8 +4299,6 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) { const TargetSubtargetInfo &STI = fn.getSubtarget(); TRI = STI.getRegisterInfo(); TII = STI.getInstrInfo(); - LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS(); - Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI(); if (EnableGlobalCopies == cl::BOU_UNSET) JoinGlobalCopies = STI.enableJoinGlobalCopies(); else @@ -4283,7 +4323,7 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) { JoinSplitEdges = EnableJoinSplits; if (VerifyCoalescing) - MF->verify(this, "Before register coalescing", &errs()); + MF->verify(LIS, SI, "Before register coalescing", &errs()); DbgVRegToValues.clear(); buildVRegToDbgValueMap(fn); @@ -4342,7 +4382,8 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) { RegToPHIIdx.clear(); LLVM_DEBUG(LIS->dump()); + if (VerifyCoalescing) - MF->verify(this, "After register coalescing", &errs()); + MF->verify(LIS, SI, "After register coalescing", &errs()); return true; } diff --git a/llvm/lib/CodeGen/RegisterCoalescer.h b/llvm/lib/CodeGen/RegisterCoalescer.h index 6926e9b5d188f0e..ec1940805ea2e3e 100644 --- a/llvm/lib/CodeGen/RegisterCoalescer.h +++ b/llvm/lib/CodeGen/RegisterCoalescer.h @@ -14,6 +14,7 @@ #ifndef LLVM_LIB_CODEGEN_REGISTERCOALESCER_H #define LLVM_LIB_CODEGEN_REGISTERCOALESCER_H +#include "llvm/CodeGen/MachinePassManager.h" #include "llvm/CodeGen/Register.h" namespace llvm { diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp index 9b93ebc36ae10d1..d9096edd3ba0750 100644 --- a/llvm/lib/Passes/PassBuilder.cpp +++ b/llvm/lib/Passes/PassBuilder.cpp @@ -127,6 +127,7 @@ #include "llvm/CodeGen/RegAllocFast.h" #include "llvm/CodeGen/RegUsageInfoCollector.h" #include "llvm/CodeGen/RegUsageInfoPropagate.h" +#include "llvm/CodeGen/RegisterCoalescerPass.h" #include "llvm/CodeGen/RegisterUsageInfo.h" #include "llvm/CodeGen/SafeStack.h" #include "llvm/CodeGen/SelectOptimize.h" diff --git a/llvm/test/CodeGen/AArch64/coalescer-drop-subreg-to-reg-imm-ops.mir b/llvm/test/CodeGen/AArch64/coalescer-drop-subreg-to-reg-imm-ops.mir index f54c612303c0eb3..b60f4ffdd880b32 100644 --- a/llvm/test/CodeGen/AArch64/coalescer-drop-subreg-to-reg-imm-ops.mir +++ b/llvm/test/CodeGen/AArch64/coalescer-drop-subreg-to-reg-imm-ops.mir @@ -1,5 +1,6 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4 # RUN: llc -mtriple=arm64-apple-macosx -mcpu=apple-m1 -verify-coalescing -run-pass=register-coalescer -o - %s | FileCheck %s +# RUN: llc -mtriple=arm64-apple-macosx -mcpu=apple-m1 -verify-coalescing -passes=register-coalescer -o - %s | FileCheck %s # Hits assert "Trying to add an operand to a machine instr that is # already done!" when rematerializing during greedy. This was because diff --git a/llvm/test/CodeGen/AMDGPU/blender-coalescer-verifier-error-empty-subrange.mir b/llvm/test/CodeGen/AMDGPU/blender-coalescer-verifier-error-empty-subrange.mir index 007c4c094029ce4..c9b47a4575200c5 100644 --- a/llvm/test/CodeGen/AMDGPU/blender-coalescer-verifier-error-empty-subrange.mir +++ b/llvm/test/CodeGen/AMDGPU/blender-coalescer-verifier-error-empty-subrange.mir @@ -1,5 +1,6 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2 # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -run-pass=register-coalescer -verify-coalescing -o - %s | FileCheck %s +# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -passes=register-coalescer -verify-coalescing -o - %s | FileCheck %s # Testcase variants from # liveout-implicit-def-subreg-redef-blender-verifier-error.mir which diff --git a/llvm/test/CodeGen/X86/coalesce-dead-lanes.mir b/llvm/test/CodeGen/X86/coalesce-dead-lanes.mir index f599ed00a3e5c2a..e4af5995c3a5303 100644 --- a/llvm/test/CodeGen/X86/coalesce-dead-lanes.mir +++ b/llvm/test/CodeGen/X86/coalesce-dead-lanes.mir @@ -1,4 +1,5 @@ # RUN: llc -run-pass register-coalescer -O0 -mtriple x86_64-pc-linux-gnu -o - %s | FileCheck %s +# RUN: llc -passes register-coalescer -O0 -mtriple x86_64-pc-linux-gnu -o - %s | FileCheck %s --- name: foo diff --git a/llvm/test/CodeGen/X86/late-remat-update.mir b/llvm/test/CodeGen/X86/late-remat-update.mir index dd4e99c6df1418f..32123124a924cce 100644 --- a/llvm/test/CodeGen/X86/late-remat-update.mir +++ b/llvm/test/CodeGen/X86/late-remat-update.mir @@ -1,5 +1,5 @@ # REQUIRES: asserts -# RUN: llc -mtriple=x86_64-- -run-pass=register-coalescer -late-remat-update-threshold=1 -stats %s -o /dev/null 2>&1 | FileCheck %s +# RUN: llc -mtriple=x86_64-- -passes=register-coalescer -late-remat-update-threshold=1 -stats %s -o /dev/null 2>&1 | FileCheck %s # Check the test will rematerialize for three copies, but will call shrinkToUses # only once to update live range because of late rematerialization update. # CHECK: 3 regalloc - Number of instructions re-materialized >From 0063bb389b6535f11ae1ab844ab2a6e2778874cb Mon Sep 17 00:00:00 2001 From: Akshat Oke <akshat....@amd.com> Date: Tue, 28 Jan 2025 09:07:39 +0000 Subject: [PATCH 2/3] change to member object --- llvm/lib/CodeGen/RegisterCoalescer.cpp | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp index 4a8fbc2c69ce2e5..e675186f6fcecbe 100644 --- a/llvm/lib/CodeGen/RegisterCoalescer.cpp +++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp @@ -376,6 +376,10 @@ class RegisterCoalescer : private LiveRangeEdit::Delegate { LiveRange &RegRange, JoinVals &Vals2); public: + // For legacy pass only. + RegisterCoalescer() {} + RegisterCoalescer &operator=(RegisterCoalescer &&Other) = default; + RegisterCoalescer(LiveIntervals *LIS, SlotIndexes *SI, const MachineLoopInfo *Loops) : LIS(LIS), SI(SI), Loops(Loops) {} @@ -385,7 +389,7 @@ class RegisterCoalescer : private LiveRangeEdit::Delegate { }; class RegisterCoalescerLegacy : public MachineFunctionPass { - std::unique_ptr<RegisterCoalescer> Impl; + RegisterCoalescer Impl; public: static char ID; ///< Class identification, replacement for typeinfo @@ -401,7 +405,7 @@ class RegisterCoalescerLegacy : public MachineFunctionPass { MachineFunctionProperties::Property::IsSSA); } - void releaseMemory() override { Impl->releaseMemory(); } + void releaseMemory() override { Impl.releaseMemory(); } /// This is the pass entry point. bool runOnMachineFunction(MachineFunction &) override; @@ -4272,8 +4276,8 @@ bool RegisterCoalescerLegacy::runOnMachineFunction(MachineFunction &MF) { auto *Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI(); auto *SIWrapper = getAnalysisIfAvailable<SlotIndexesWrapperPass>(); SlotIndexes *SI = SIWrapper ? &SIWrapper->getSI() : nullptr; - Impl.reset(new RegisterCoalescer(LIS, SI, Loops)); - return Impl->run(MF); + Impl = RegisterCoalescer(LIS, SI, Loops); + return Impl.run(MF); } bool RegisterCoalescer::run(MachineFunction &fn) { >From fae7ae58e8898d83683b131734301cf07dc0002a Mon Sep 17 00:00:00 2001 From: Akshat Oke <akshat....@amd.com> Date: Thu, 30 Jan 2025 09:53:52 +0000 Subject: [PATCH 3/3] remove releaseMemory() --- llvm/lib/CodeGen/RegisterCoalescer.cpp | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp index e675186f6fcecbe..5781d1e6d37cc16 100644 --- a/llvm/lib/CodeGen/RegisterCoalescer.cpp +++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp @@ -384,13 +384,10 @@ class RegisterCoalescer : private LiveRangeEdit::Delegate { const MachineLoopInfo *Loops) : LIS(LIS), SI(SI), Loops(Loops) {} - void releaseMemory(); bool run(MachineFunction &MF); }; class RegisterCoalescerLegacy : public MachineFunctionPass { - RegisterCoalescer Impl; - public: static char ID; ///< Class identification, replacement for typeinfo @@ -405,8 +402,6 @@ class RegisterCoalescerLegacy : public MachineFunctionPass { MachineFunctionProperties::Property::IsSSA); } - void releaseMemory() override { Impl.releaseMemory(); } - /// This is the pass entry point. bool runOnMachineFunction(MachineFunction &) override; }; @@ -4246,14 +4241,6 @@ void RegisterCoalescer::joinAllIntervals() { lateLiveIntervalUpdate(); } -void RegisterCoalescer::releaseMemory() { - ErasedInstrs.clear(); - WorkList.clear(); - DeadDefs.clear(); - InflateRegs.clear(); - LargeLIVisitCounter.clear(); -} - PreservedAnalyses RegisterCoalescerPass::run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM) { @@ -4276,7 +4263,7 @@ bool RegisterCoalescerLegacy::runOnMachineFunction(MachineFunction &MF) { auto *Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI(); auto *SIWrapper = getAnalysisIfAvailable<SlotIndexesWrapperPass>(); SlotIndexes *SI = SIWrapper ? &SIWrapper->getSI() : nullptr; - Impl = RegisterCoalescer(LIS, SI, Loops); + RegisterCoalescer Impl(LIS, SI, Loops); return Impl.run(MF); } _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
