Author: Ivan Butygin Date: 2024-12-31T18:54:48+03:00 New Revision: 7b713e8f46465186c777b4822f612bce20396e79
URL: https://github.com/llvm/llvm-project/commit/7b713e8f46465186c777b4822f612bce20396e79 DIFF: https://github.com/llvm/llvm-project/commit/7b713e8f46465186c777b4822f612bce20396e79.diff LOG: Revert "[mlir][nfc] GpuToROCDL: Remove some dead code (#121395)" This reverts commit 0b08e095cc05288d1209cf051988621f6935c940. Added: Modified: mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp Removed: ################################################################################ diff --git a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp index a1cefe289a696f..d52a86987b1cef 100644 --- a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp +++ b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp @@ -47,6 +47,7 @@ #include "../GPUCommon/GPUOpsLowering.h" #include "../GPUCommon/IndexIntrinsicsOpLowering.h" +#include "../GPUCommon/OpToFuncCallLowering.h" namespace mlir { #define GEN_PASS_DEF_CONVERTGPUOPSTOROCDLOPS @@ -345,6 +346,16 @@ void mlir::configureGpuToROCDLConversionLegality(ConversionTarget &target) { target.addLegalOp<gpu::YieldOp, gpu::GPUModuleOp>(); } +template <typename OpTy> +static void populateOpPatterns(const LLVMTypeConverter &converter, + RewritePatternSet &patterns, StringRef f32Func, + StringRef f64Func, StringRef f32ApproxFunc, + StringRef f16Func) { + patterns.add<ScalarizeVectorOpLowering<OpTy>>(converter); + patterns.add<OpToFuncCallLowering<OpTy>>(converter, f32Func, f32ApproxFunc, + f16Func); +} + void mlir::populateGpuToROCDLConversionPatterns( const LLVMTypeConverter &converter, RewritePatternSet &patterns, mlir::gpu::amd::Runtime runtime) { _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
