================
@@ -1387,18 +1357,34 @@ static bool readsLaneSubset(const MachineRegisterInfo
&MRI,
DestSrc->Destination->getSubReg() == DestSrc->Source->getSubReg())
return false;
+ Register Reg = VirtReg.reg();
+
// FIXME: We're only considering uses, but should be consider defs too?
- LaneBitmask ReadMask = getInstReadLaneMask(MRI, *TRI, *MI, VirtReg.reg());
+ LaneBitmask UseMask;
+ SmallVector<std::pair<MachineInstr *, unsigned>, 8> Ops;
+ (void)AnalyzeVirtRegInBundle(const_cast<MachineInstr &>(*MI), Reg, &Ops);
- LaneBitmask LiveAtMask;
- for (const LiveInterval::SubRange &S : VirtReg.subranges()) {
- if (S.liveAt(Use))
- LiveAtMask |= S.LaneMask;
+ for (auto [MI, OpIdx] : Ops) {
+ const MachineOperand &MO = MI->getOperand(OpIdx);
+ assert(MO.isReg() && MO.getReg() == Reg);
+ unsigned SubReg = MO.getSubReg();
+ if (SubReg == 0 && MO.isUse()) {
+ if (MO.isUndef())
+ continue;
+ return false;
----------------
qcolombet wrote:
Ah that makes sense. Thanks for updating the comment of the function.
https://github.com/llvm/llvm-project/pull/120199
_______________________________________________
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
