https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/118648
>From 5e0861e23ee92934400ce9d8672d33b995d9d6fa Mon Sep 17 00:00:00 2001
From: Matt Arsenault <matthew.arsena...@amd.com>
Date: Wed, 4 Dec 2024 09:07:01 -0500
Subject: [PATCH] AMDGPU: Simplify definition of bitop3 operand. NFC.
Co-authored-by: Jay Foad <jay.f...@amd.com>
---
.../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 17 -----------------
llvm/lib/Target/AMDGPU/SIInstrInfo.td | 3 ++-
2 files changed, 2 insertions(+), 18 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 37a8c7fef7d0af..ed956a1f755c06 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -1920,9 +1920,6 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
ParseStatus parseEndpgm(OperandVector &Operands);
ParseStatus parseVOPD(OperandVector &Operands);
-
- ParseStatus parseBitOp3(OperandVector &Operands);
- AMDGPUOperand::Ptr defaultBitOp3() const;
};
} // end anonymous namespace
@@ -9796,20 +9793,6 @@ ParseStatus AMDGPUAsmParser::parseEndpgm(OperandVector
&Operands) {
bool AMDGPUOperand::isEndpgm() const { return isImmTy(ImmTyEndpgm); }
-//===----------------------------------------------------------------------===//
-// BITOP3
-//===----------------------------------------------------------------------===//
-
-ParseStatus AMDGPUAsmParser::parseBitOp3(OperandVector &Operands) {
- ParseStatus Res =
- parseIntWithPrefix("bitop3", Operands, AMDGPUOperand::ImmTyBitOp3);
- return Res;
-}
-
-AMDGPUOperand::Ptr AMDGPUAsmParser::defaultBitOp3() const {
- return AMDGPUOperand::CreateImm(this, 0, SMLoc(),
AMDGPUOperand::ImmTyBitOp3);
-}
-
//===----------------------------------------------------------------------===//
// Split Barrier
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td
b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
index fc8c12a674e466..7bc6db4cec1065 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
@@ -1271,7 +1271,8 @@ def ByteSel : NamedIntOperand<"byte_sel"> {
let Validator = "isUInt<2>";
}
-def BitOp3 : CustomOperand<i32, 1, "BitOp3">;
+let PrintMethod = "printBitOp3" in
+def BitOp3 : NamedIntOperand<"bitop3">;
def bitop3_0 : DefaultOperand<BitOp3, 0>;
class KImmFPOperand<ValueType vt> : ImmOperand<vt> {
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