https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/116510
Backport 22bc9db92b46965882b1c77aebc86430149b0912 Requested by: @tstellar >From 00c9d22eaafa6258da38cafd3a636c1106d238c4 Mon Sep 17 00:00:00 2001 From: Jonas Paulsson <pauls...@linux.ibm.com> Date: Fri, 26 Jul 2024 14:33:40 +0200 Subject: [PATCH] [SystemZ] Use the EVT version of getVectorVT() in combineTruncateExtract(). (#100150) A test case showed up where the new vector type is v24i16, which is not a simple MVT. In order to get an extended value type for cases like this, EVT::getVectorVT() needs to be called instead of MVT::getVectorVT(), otherwise the following call to getVectorElementType() in combineExtract() will fail. (cherry picked from commit 22bc9db92b46965882b1c77aebc86430149b0912) --- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 3 ++- llvm/test/CodeGen/SystemZ/vec-combine-01.ll | 10 ++++++++++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp index b2b88143354a59..383393914a1695 100644 --- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -6653,7 +6653,8 @@ SDValue SystemZTargetLowering::combineTruncateExtract( // Defer the creation of the bitcast from X to combineExtract, // which might be able to optimize the extraction. - VecVT = MVT::getVectorVT(MVT::getIntegerVT(TruncBytes * 8), + VecVT = EVT::getVectorVT(*DCI.DAG.getContext(), + MVT::getIntegerVT(TruncBytes * 8), VecVT.getStoreSize() / TruncBytes); EVT ResVT = (TruncBytes < 4 ? MVT::i32 : TruncVT); return combineExtract(DL, ResVT, VecVT, Vec, NewIndex, DCI, true); diff --git a/llvm/test/CodeGen/SystemZ/vec-combine-01.ll b/llvm/test/CodeGen/SystemZ/vec-combine-01.ll index 6f0abd6ea5bafe..16231b2d895264 100644 --- a/llvm/test/CodeGen/SystemZ/vec-combine-01.ll +++ b/llvm/test/CodeGen/SystemZ/vec-combine-01.ll @@ -153,3 +153,13 @@ define void @f7(ptr %ptr1, ptr %ptr2, ptr %ptr3, ptr %ptr4) { store i8 %trunc3, ptr %ptr4 ret void } + +; Test that a truncating store with a non-simple VT can be handled. +define void @f8(ptr %src, ptr %dst) { +; CHECK-LABEL: f8: + %1 = load <12 x i32>, ptr %src, align 64 + %2 = extractelement <12 x i32> %1, i64 11 + %3 = trunc i32 %2 to i16 + store i16 %3, ptr %dst, align 2 + ret void +} _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits