================ @@ -3851,3 +3851,14 @@ SIRegisterInfo::getSubRegAlignmentNumBits(const TargetRegisterClass *RC, } return 0; } + +SmallVector<StringLiteral> +SIRegisterInfo::getVRegFlagsOfReg(Register Reg, + const MachineFunction &MF) const { + SmallVector<StringLiteral> RegFlags; + const SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); + if (FuncInfo->checkFlag(Reg, AMDGPU::VirtRegFlag::WWM_REG)) { + RegFlags.push_back("WWM_REG"); + } ---------------- arsenm wrote:
```suggestion if (FuncInfo->checkFlag(Reg, AMDGPU::VirtRegFlag::WWM_REG)) RegFlags.push_back("WWM_REG"); ``` https://github.com/llvm/llvm-project/pull/110229 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits