github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
<details>
<summary>
You can test this locally with the following command:
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``````````bash
git-clang-format --diff b9a85cef41e26f6f468c87a00f2072ea798ec628
af30ca7d438747ce58dd79ef293a9914ceef592f --extensions cpp --
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
index 0427b021d4..505802c679 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -2534,15 +2534,11 @@ bool
SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
if (isVGPRClass(getPhysRegBaseClass(MaterializedReg))) {
// If we know we have a VGPR already, it's more likely the other
// operand is a legal vsrc0.
- AddI32
- .add(*OtherOp)
- .addReg(MaterializedReg, MaterializedRegFlags);
+ AddI32.add(*OtherOp).addReg(MaterializedReg, MaterializedRegFlags);
} else {
// Commute operands to avoid violating VOP2 restrictions. This will
// typically happen when using scratch.
- AddI32
- .addReg(MaterializedReg, MaterializedRegFlags)
- .add(*OtherOp);
+ AddI32.addReg(MaterializedReg, MaterializedRegFlags).add(*OtherOp);
}
if (MI->getOpcode() == AMDGPU::V_ADD_CO_U32_e64 ||
``````````
</details>
https://github.com/llvm/llvm-project/pull/102346
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