https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/102816
None >From cc51e15865010c73cf7bd3ab8632b965aa7a9dbf Mon Sep 17 00:00:00 2001 From: Matt Arsenault <matthew.arsena...@amd.com> Date: Sun, 11 Aug 2024 18:20:23 +0400 Subject: [PATCH] AMDGPU/NewPM: Start implementing addCodeGenPrepare --- llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp | 11 +++++++++++ llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h | 4 +++- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 1 + 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp index 36f44a20d9553..252a70d44736d 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp @@ -19,6 +19,7 @@ #include "llvm/Transforms/Scalar/StructurizeCFG.h" #include "llvm/Transforms/Utils/FixIrreducible.h" #include "llvm/Transforms/Utils/LCSSA.h" +#include "llvm/Transforms/Utils/LowerSwitch.h" #include "llvm/Transforms/Utils/UnifyLoopExits.h" using namespace llvm; @@ -35,6 +36,16 @@ AMDGPUCodeGenPassBuilder::AMDGPUCodeGenPassBuilder( ShadowStackGCLoweringPass>(); } +void AMDGPUCodeGenPassBuilder::addCodeGenPrepare(AddIRPass &addPass) const { + Base::addCodeGenPrepare(addPass); + + // LowerSwitch pass may introduce unreachable blocks that can cause unexpected + // behavior for subsequent passes. Placing it here seems better that these + // blocks would get cleaned up by UnreachableBlockElim inserted next in the + // pass flow. + addPass(LowerSwitchPass()); +} + void AMDGPUCodeGenPassBuilder::addPreISel(AddIRPass &addPass) const { const bool LateCFGStructurize = AMDGPUTargetMachine::EnableLateStructurizeCFG; const bool DisableStructurizer = AMDGPUTargetMachine::DisableStructurizer; diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h index e656e166b3eb2..efb296689bd64 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h @@ -19,10 +19,12 @@ class GCNTargetMachine; class AMDGPUCodeGenPassBuilder : public CodeGenPassBuilder<AMDGPUCodeGenPassBuilder, GCNTargetMachine> { public: + using Base = CodeGenPassBuilder<AMDGPUCodeGenPassBuilder, GCNTargetMachine>; + AMDGPUCodeGenPassBuilder(GCNTargetMachine &TM, const CGPassBuilderOption &Opts, PassInstrumentationCallbacks *PIC); - + void addCodeGenPrepare(AddIRPass &) const; void addPreISel(AddIRPass &addPass) const; void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const; Error addInstSelector(AddMachinePass &) const; diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index 5929dadf93bcb..cad4585c5b301 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -67,6 +67,7 @@ #include "llvm/Transforms/Scalar/GVN.h" #include "llvm/Transforms/Scalar/InferAddressSpaces.h" #include "llvm/Transforms/Utils.h" +#include "llvm/Transforms/Utils/LowerSwitch.h" #include "llvm/Transforms/Utils/SimplifyLibCalls.h" #include "llvm/Transforms/Vectorize/LoadStoreVectorizer.h" #include <optional> _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits