https://github.com/tru updated https://github.com/llvm/llvm-project/pull/100297
>From aa425eb0e2f5174e50ec84766861ae3f6186d39b Mon Sep 17 00:00:00 2001 From: hev <wang...@loongson.cn> Date: Wed, 24 Jul 2024 12:08:43 +0800 Subject: [PATCH] [LoongArch] Fix codegen for ISD::ROTR (#100292) This patch fixes the code generation for IR: sext i32 (trunc i64 (rotr i64 %x, i64 %y) to i32) to i64 (cherry picked from commit e386aacb747b4512dedf481ad83e054d3dd641e6) --- .../Target/LoongArch/LoongArchInstrInfo.td | 1 - llvm/test/CodeGen/LoongArch/rotl-rotr.ll | 36 +++++++++++++++++++ 2 files changed, 36 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td index 97f0e8d6a10c7..ec0d071453c3f 100644 --- a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td +++ b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td @@ -1144,7 +1144,6 @@ def : PatGprGpr<urem, MOD_DU>; def : PatGprGpr<loongarch_mod_wu, MOD_WU>; def : PatGprGpr<rotr, ROTR_D>; def : PatGprGpr<loongarch_rotr_w, ROTR_W>; -def : PatGprGpr_32<rotr, ROTR_W>; def : PatGprImm<rotr, ROTRI_D, uimm6>; def : PatGprImm_32<rotr, ROTRI_W, uimm5>; def : PatGprImm<loongarch_rotr_w, ROTRI_W, uimm5>; diff --git a/llvm/test/CodeGen/LoongArch/rotl-rotr.ll b/llvm/test/CodeGen/LoongArch/rotl-rotr.ll index b2d46f5c088ba..75461f5820984 100644 --- a/llvm/test/CodeGen/LoongArch/rotl-rotr.ll +++ b/llvm/test/CodeGen/LoongArch/rotl-rotr.ll @@ -504,6 +504,42 @@ define i64 @rotr_64_mask_or_128_or_64(i64 %x, i64 %y) nounwind { ret i64 %f } +define signext i32 @rotr_64_trunc_32(i64 %x, i64 %y) nounwind { +; LA32-LABEL: rotr_64_trunc_32: +; LA32: # %bb.0: +; LA32-NEXT: srl.w $a3, $a0, $a2 +; LA32-NEXT: xori $a4, $a2, 31 +; LA32-NEXT: slli.w $a5, $a1, 1 +; LA32-NEXT: sll.w $a4, $a5, $a4 +; LA32-NEXT: or $a3, $a3, $a4 +; LA32-NEXT: addi.w $a4, $a2, -32 +; LA32-NEXT: slti $a5, $a4, 0 +; LA32-NEXT: maskeqz $a3, $a3, $a5 +; LA32-NEXT: srl.w $a1, $a1, $a4 +; LA32-NEXT: masknez $a1, $a1, $a5 +; LA32-NEXT: or $a1, $a3, $a1 +; LA32-NEXT: sub.w $a3, $zero, $a2 +; LA32-NEXT: sll.w $a0, $a0, $a3 +; LA32-NEXT: ori $a3, $zero, 32 +; LA32-NEXT: sub.w $a2, $a3, $a2 +; LA32-NEXT: srai.w $a2, $a2, 31 +; LA32-NEXT: and $a0, $a2, $a0 +; LA32-NEXT: or $a0, $a1, $a0 +; LA32-NEXT: ret +; +; LA64-LABEL: rotr_64_trunc_32: +; LA64: # %bb.0: +; LA64-NEXT: rotr.d $a0, $a0, $a1 +; LA64-NEXT: addi.w $a0, $a0, 0 +; LA64-NEXT: ret + %z = sub i64 64, %y + %b = lshr i64 %x, %y + %c = shl i64 %x, %z + %d = or i64 %b, %c + %e = trunc i64 %d to i32 + ret i32 %e +} + define signext i32 @rotri_i32(i32 signext %a) nounwind { ; LA32-LABEL: rotri_i32: ; LA32: # %bb.0: _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits