llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-aarch64 Author: Igor Kudrin (igorkudrin) <details> <summary>Changes</summary> For synchronous unwind tables, the call frame information can be slightly reduced by bundling the `.cfi_negate_ra_state` instruction with other CFI instructions in the prolog, saving 1 byte per function used for `DW_CFA_advance_loc`. This was suggested in [D156428](https://reviews.llvm.org/D156428#<!-- -->4554317). --- Patch is 24.95 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/96377.diff 12 Files Affected: - (modified) llvm/lib/Target/AArch64/AArch64PointerAuth.cpp (+13) - (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll (+2-1) - (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll (+4-2) - (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll (+6-3) - (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir (+2-1) - (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll (+6-3) - (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll (+6-3) - (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll (+8-4) - (modified) llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll (+6-3) - (modified) llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll (+8-5) - (modified) llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll (+14-14) - (modified) llvm/test/CodeGen/AArch64/sign-return-address.ll (+9-9) ``````````diff diff --git a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp index e900f6881620f..eb0ff73200407 100644 --- a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp +++ b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp @@ -100,6 +100,7 @@ void AArch64PointerAuth::signLR(MachineFunction &MF, auto &MFnI = *MF.getInfo<AArch64FunctionInfo>(); bool UseBKey = MFnI.shouldSignWithBKey(); bool EmitCFI = MFnI.needsDwarfUnwindInfo(MF); + bool EmitAsyncCFI = MFnI.needsAsyncDwarfUnwindInfo(MF); bool NeedsWinCFI = MF.hasWinCFI(); MachineBasicBlock &MBB = *MBBI->getParent(); @@ -137,6 +138,18 @@ void AArch64PointerAuth::signLR(MachineFunction &MF, } if (EmitCFI) { + if (!EmitAsyncCFI) { + // Reduce the size of the generated call frame information for synchronous + // CFI by bundling the new CFI instruction with others in the prolog, so + // that no additional DW_CFA_advance_loc is needed. + for (auto I = MBBI; I != MBB.end(); ++I) { + if (I->getOpcode() == TargetOpcode::CFI_INSTRUCTION && + I->getFlag(MachineInstr::FrameSetup)) { + MBBI = I; + break; + } + } + } unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createNegateRAState(nullptr)); BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll index 4bbbe40176313..c64b3842aa5ba 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll @@ -11,7 +11,8 @@ define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" { ; CHECK-NEXT: .cfi_b_key_frame ; V8A-NEXT: hint #27 ; V83A-NEXT: pacibsp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll index f4e9c0a4c2204..3221815da33c5 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll @@ -7,7 +7,8 @@ define void @a() "sign-return-address"="all" { ; CHECK-LABEL: a: // @a ; V8A: hint #25 ; V83A: paciasp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -54,7 +55,8 @@ define void @c() "sign-return-address"="all" { ; CHECK-LABEL: c: // @c ; V8A: hint #25 ; V83A: paciasp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll index 5dfdba21ed6a6..d43b74b9451aa 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll @@ -8,7 +8,8 @@ define i64 @a(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key" ; CHECK: .cfi_b_key_frame ; V8A-NEXT: hint #27 ; V83A-NEXT: pacibsp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -30,7 +31,8 @@ define i64 @b(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key" ; CHECK: .cfi_b_key_frame ; V8A-NEXT: hint #27 ; V83A-NEXT: pacibsp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -52,7 +54,8 @@ define i64 @c(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key" ; CHECK: .cfi_b_key_frame ; V8A-NEXT: hint #27 ; V83A-NEXT: pacibsp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir index 9a983cbd6714e..ba27d1c681e3f 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir @@ -82,7 +82,8 @@ body: | # CHECK: bb.0: # CHECK: frame-setup EMITBKEY # CHECK-NEXT: frame-setup PACIBSP implicit-def $lr, implicit $lr, implicit $sp -# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state +# CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state +# CHECK-NEXT: frame-setup CFI_INSTRUCTION # CHECK-NOT: OUTLINED_FUNCTION_ # CHECK: bb.1: # CHECK-NOT: OUTLINED_FUNCTION_ diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll index decf6a9bae23c..8c36ab4d8f403 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll @@ -7,7 +7,8 @@ define void @a() "sign-return-address"="all" { ; CHECK-LABEL: a: // @a ; V8A: hint #25 ; V83A: paciasp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -31,7 +32,8 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" { ; CHECK: .cfi_b_key_frame ; V8A-NEXT: hint #27 ; V83A-NEXT: pacibsp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 @@ -55,7 +57,8 @@ define void @c() "sign-return-address"="all" { ; CHECK-LABEL: c: // @c ; V8A: hint #25 ; V83A: paciasp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll index a7ea32952f3b7..d5ef94e900993 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll @@ -10,7 +10,8 @@ define void @a() #0 { ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame ; CHECK-NEXT: pacibsp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset ; CHECK-NOT: OUTLINED_FUNCTION_ %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -34,7 +35,8 @@ define void @b() #0 { ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame ; CHECK-NEXT: pacibsp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset ; CHECK-NOT: OUTLINED_FUNCTION_ %1 = alloca i32, align 4 %2 = alloca i32, align 4 @@ -58,7 +60,8 @@ define void @c() #1 { ; CHECK: // %bb.0: ; CHECK-NEXT: .cfi_b_key_frame ; CHECK-NEXT: hint #27 -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset ; CHECK-NOT: OUTLINED_FUNCTION_ %1 = alloca i32, align 4 %2 = alloca i32, align 4 diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll index e09b1e3104221..3e361111b5455 100644 --- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll +++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll @@ -11,7 +11,8 @@ define i32 @a() #0 { ; CHECK: // %bb.0: // %entry ; V8A-NEXT: hint #25 ; V83A-NEXT: paciasp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset ; V8A: hint #29 ; V8A-NEXT: ret ; V83A: retaa @@ -26,7 +27,8 @@ define i32 @b() #0 { ; CHECK: // %bb.0: // %entry ; V8A-NEXT: hint #25 ; V83A-NEXT: paciasp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset ; V8A: hint #29 ; V8A-NEXT: ret ; V83A: retaa @@ -41,7 +43,8 @@ define hidden i32 @c(ptr %fptr) #0 { ; CHECK: // %bb.0: // %entry ; V8A-NEXT: hint #25 ; V83A-NEXT: paciasp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset ; V8A: hint #29 ; V8A-NEXT: ret ; V83A: retaa @@ -56,7 +59,8 @@ define hidden i32 @d(ptr %fptr) #0 { ; CHECK: // %bb.0: // %entry ; V8A-NEXT: hint #25 ; V83A-NEXT: paciasp -; CHECK-NEXT: .cfi_negate_ra_state +; CHECK: .cfi_negate_ra_state +; CHECK-NEXT: .cfi_def_cfa_offset ; V8A: hint #29 ; V8A-NEXT: ret ; V83A: retaa diff --git a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll index 1515db46efc46..7161416a89eb4 100644 --- a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll +++ b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll @@ -1,4 +1,4 @@ -;; RUN: llc --mattr=+v8.3a %s -o - | FileCheck %s +;; RUN: llc --mattr=+v8.3a %s -o - | tee %t.log | FileCheck %s target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target triple = "aarch64-unknown-linux" @@ -35,7 +35,8 @@ entry: ;; CHECK-LABEL: __llvm_gcov_writeout: ;; CHECK: .cfi_b_key_frame ;; CHECK-NEXT: pacibsp -;; CHECK-NEXT: .cfi_negate_ra_state +;; CHECK: .cfi_negate_ra_state +;; CHECK-NEXT: .cfi_def_cfa_offset define internal void @__llvm_gcov_reset() unnamed_addr #2 { entry: @@ -55,7 +56,9 @@ entry: ;; CHECK-LABEL: __llvm_gcov_init: ;; CHECK: .cfi_b_key_frame ;; CHECK-NEXT: pacibsp -;; CHECK-NEXT: .cfi_negate_ra_state +;; CHECK-NEXT: .cfi_negate_ra_state +;; CHECK-NOT: .cfi_ +;; CHECK: .cfi_endproc attributes #0 = { norecurse nounwind readnone "sign-return-address"="all" "sign-return-address-key"="b_key" } attributes #1 = { noinline } diff --git a/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll b/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll index 9464e3447993b..eb224bbbd601f 100644 --- a/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll +++ b/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll @@ -10,8 +10,8 @@ define dso_local i32 @_Z3fooi(i32 %x) #0 { ; CHECK-V8A-LABEL: _Z3fooi: ; CHECK-V8A: // %bb.0: // %entry ; CHECK-V8A-NEXT: hint #25 -; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: .cfi_def_cfa_offset 16 ; CHECK-V8A-NEXT: .cfi_offset w30, -16 ; CHECK-V8A-NEXT: str w0, [sp, #8] @@ -28,8 +28,8 @@ define dso_local i32 @_Z3fooi(i32 %x) #0 { ; CHECK-V83A-LABEL: _Z3fooi: ; CHECK-V83A: // %bb.0: // %entry ; CHECK-V83A-NEXT: paciasp -; CHECK-V83A-NEXT: .cfi_negate_ra_state ; CHECK-V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; CHECK-V83A-NEXT: .cfi_negate_ra_state ; CHECK-V83A-NEXT: .cfi_def_cfa_offset 16 ; CHECK-V83A-NEXT: .cfi_offset w30, -16 ; CHECK-V83A-NEXT: str w0, [sp, #8] @@ -57,7 +57,8 @@ return: ; No predecessors! } ; For asynchronous unwind tables, we need to flip the value of RA_SIGN_STATE -; before and after the tail call. +; before and after the tail call. In the prolog, RA_SIGN_STATE is updated right +; after the corresponding 'PACIASP' instruction. define hidden noundef i32 @baz_async(i32 noundef %a) #0 uwtable(async) { ; CHECK-V8A-LABEL: baz_async: ; CHECK-V8A: // %bb.0: // %entry @@ -137,12 +138,14 @@ return: ; preds = %if.else, %if.then ; around the tail call. The tail-called function might throw an exception, but ; at this point we are set up to return into baz's caller, so the unwinder will ; never see baz's unwind table for that exception. +; The '.cfi_negate_ra_state' instruction in the prolog can be bundled with other +; CFI instructions to avoid emitting superfluous DW_CFA_advance_loc. define hidden noundef i32 @baz_sync(i32 noundef %a) #0 uwtable(sync) { ; CHECK-V8A-LABEL: baz_sync: ; CHECK-V8A: // %bb.0: // %entry ; CHECK-V8A-NEXT: hint #25 -; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; CHECK-V8A-NEXT: .cfi_negate_ra_state ; CHECK-V8A-NEXT: .cfi_def_cfa_offset 16 ; CHECK-V8A-NEXT: .cfi_offset w30, -16 ; CHECK-V8A-NEXT: cbz w0, .LBB2_2 @@ -162,8 +165,8 @@ define hidden noundef i32 @baz_sync(i32 noundef %a) #0 uwtable(sync) { ; CHECK-V83A-LABEL: baz_sync: ; CHECK-V83A: // %bb.0: // %entry ; CHECK-V83A-NEXT: paciasp -; CHECK-V83A-NEXT: .cfi_negate_ra_state ; CHECK-V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; CHECK-V83A-NEXT: .cfi_negate_ra_state ; CHECK-V83A-NEXT: .cfi_def_cfa_offset 16 ; CHECK-V83A-NEXT: .cfi_offset w30, -16 ; CHECK-V83A-NEXT: cbz w0, .LBB2_2 diff --git a/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll b/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll index a78fa853d99dc..888ab8e73f113 100644 --- a/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll +++ b/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll @@ -95,8 +95,8 @@ define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" { ; COMPAT-NEXT: hint #39 ; COMPAT-NEXT: .Ltmp1: ; COMPAT-NEXT: hint #25 -; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: .cfi_def_cfa_offset 16 ; COMPAT-NEXT: .cfi_offset w30, -16 ; COMPAT-NEXT: //APP @@ -113,8 +113,8 @@ define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" { ; V83A-NEXT: hint #39 ; V83A-NEXT: .Ltmp1: ; V83A-NEXT: paciasp -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: .cfi_def_cfa_offset 16 ; V83A-NEXT: .cfi_offset w30, -16 ; V83A-NEXT: //APP @@ -129,8 +129,8 @@ define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" { ; PAUTHLR: // %bb.0: ; PAUTHLR-NEXT: .Ltmp1: ; PAUTHLR-NEXT: paciasppc -; PAUTHLR-NEXT: .cfi_negate_ra_state ; PAUTHLR-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; PAUTHLR-NEXT: .cfi_negate_ra_state ; PAUTHLR-NEXT: .cfi_def_cfa_offset 16 ; PAUTHLR-NEXT: .cfi_offset w30, -16 ; PAUTHLR-NEXT: //APP @@ -150,8 +150,8 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" { ; COMPAT-NEXT: hint #39 ; COMPAT-NEXT: .Ltmp2: ; COMPAT-NEXT: hint #25 -; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: .cfi_def_cfa_offset 16 ; COMPAT-NEXT: .cfi_offset w30, -16 ; COMPAT-NEXT: bl foo @@ -166,8 +166,8 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" { ; V83A-NEXT: hint #39 ; V83A-NEXT: .Ltmp2: ; V83A-NEXT: paciasp -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: .cfi_def_cfa_offset 16 ; V83A-NEXT: .cfi_offset w30, -16 ; V83A-NEXT: bl foo @@ -180,8 +180,8 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" { ; PAUTHLR: // %bb.0: ; PAUTHLR-NEXT: .Ltmp2: ; PAUTHLR-NEXT: paciasppc -; PAUTHLR-NEXT: .cfi_negate_ra_state ; PAUTHLR-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; PAUTHLR-NEXT: .cfi_negate_ra_state ; PAUTHLR-NEXT: .cfi_def_cfa_offset 16 ; PAUTHLR-NEXT: .cfi_offset w30, -16 ; PAUTHLR-NEXT: bl foo @@ -197,8 +197,8 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" { ; COMPAT-NEXT: hint #39 ; COMPAT-NEXT: .Ltmp3: ; COMPAT-NEXT: hint #25 -; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: .cfi_def_cfa_offset 16 ; COMPAT-NEXT: .cfi_offset w30, -16 ; COMPAT-NEXT: bl foo @@ -213,8 +213,8 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" { ; V83A-NEXT: hint #39 ; V83A-NEXT: .Ltmp3: ; V83A-NEXT: paciasp -; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; V83A-NEXT: .cfi_negate_ra_state ; V83A-NEXT: .cfi_def_cfa_offset 16 ; V83A-NEXT: .cfi_offset w30, -16 ; V83A-NEXT: bl foo @@ -227,8 +227,8 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" { ; PAUTHLR: // %bb.0: ; PAUTHLR-NEXT: .Ltmp3: ; PAUTHLR-NEXT: paciasppc -; PAUTHLR-NEXT: .cfi_negate_ra_state ; PAUTHLR-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; PAUTHLR-NEXT: .cfi_negate_ra_state ; PAUTHLR-NEXT: .cfi_def_cfa_offset 16 ; PAUTHLR-NEXT: .cfi_offset w30, -16 ; PAUTHLR-NEXT: bl foo @@ -247,8 +247,8 @@ define i32 @non_leaf_scs(i32 %x) "sign-return-address"="non-leaf" shadowcallstac ; CHECK-NEXT: hint #39 ; CHECK-NEXT: .Ltmp4: ; CHECK-NEXT: paciasp -; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; CHECK-NEXT: .cfi_negate_ra_state ; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_offset w30, -16 ; CHECK-NEXT: bl foo @@ -265,8 +265,8 @@ define i32 @non_leaf_scs(i32 %x) "sign-return-address"="non-leaf" shadowcallstac ; PAUTHLR-NEXT: .cfi_escape 0x16, 0x12, 0x02, 0x82, 0x78 // ; PAUTHLR-NEXT: .Ltmp4: ; PAUTHLR-NEXT: paciasppc -; PAUTHLR-NEXT: .cfi_negate_ra_state ; PAUTHLR-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; PAUTHLR-NEXT: .cfi_negate_ra_state ; PAUTHLR-NEXT: .cfi_def_cfa_offset 16 ; PAUTHLR-NEXT: .cfi_offset w30, -16 ; PAUTHLR-NEXT: bl foo @@ -306,8 +306,8 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" { ; COMPAT-NEXT: hint #39 ; COMPAT-NEXT: .Ltmp6: ; COMPAT-NEXT: hint #25 -; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; COMPAT-NEXT: .cfi_negate_ra_state ; COMPAT-NEXT: .cfi_def_cfa_offset 16 ; COMPAT-NEXT: ... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/96377 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
