Author: Paul Walker Date: 2023-09-25T13:02:05+02:00 New Revision: 701620d58cdf00212eadabfde28cea53c5b06675
URL: https://github.com/llvm/llvm-project/commit/701620d58cdf00212eadabfde28cea53c5b06675 DIFF: https://github.com/llvm/llvm-project/commit/701620d58cdf00212eadabfde28cea53c5b06675.diff LOG: [SVE] Precommit test to show missing initialisation of call operand. When calling func_f8_and_v0_passed_via_memory the memory used to hold the first vector operand is allocated but not initialised. Added: Modified: llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll Removed: ################################################################################ diff --git a/llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll b/llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll index 251e06bad004bab..bd5337083f774a1 100644 --- a/llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll +++ b/llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll @@ -64,13 +64,13 @@ define float @foo2(ptr %x0, ptr %x1) nounwind { ; CHECK-NEXT: ld4d { z16.d - z19.d }, p0/z, [x1] ; CHECK-NEXT: fmov s0, #1.00000000 ; CHECK-NEXT: mov w0, wzr -; CHECK-NEXT: mov w1, #1 -; CHECK-NEXT: mov w2, #2 -; CHECK-NEXT: mov w3, #3 -; CHECK-NEXT: mov w4, #4 -; CHECK-NEXT: mov w5, #5 -; CHECK-NEXT: mov w6, #6 -; CHECK-NEXT: mov w7, #7 +; CHECK-NEXT: mov w1, #1 // =0x1 +; CHECK-NEXT: mov w2, #2 // =0x2 +; CHECK-NEXT: mov w3, #3 // =0x3 +; CHECK-NEXT: mov w4, #4 // =0x4 +; CHECK-NEXT: mov w5, #5 // =0x5 +; CHECK-NEXT: mov w6, #6 // =0x6 +; CHECK-NEXT: mov w7, #7 // =0x7 ; CHECK-NEXT: add x9, sp, #16 ; CHECK-NEXT: ptrue p0.d ; CHECK-NEXT: st1d { z16.d }, p0, [x9] @@ -694,6 +694,36 @@ define <vscale x 4 x float> @sve_ret_caller_non_sve_callee_high_range() { ret <vscale x 4 x float> undef } +declare void @func_f8_and_v0_passed_via_memory(float %f0, float %f1, float %f2, float %f3, float %f4, float %f5, float %f6, float %f7, float %f8, <vscale x 4 x float> %v0) +define void @verify_all_operands_are_initialised() { +; CHECK-LABEL: verify_all_operands_are_initialised: +; CHECK: // %bb.0: +; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill +; CHECK-NEXT: addvl sp, sp, #-1 +; CHECK-NEXT: sub sp, sp, #16 +; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x20, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 32 + 8 * VG +; CHECK-NEXT: .cfi_offset w30, -8 +; CHECK-NEXT: .cfi_offset w29, -16 +; CHECK-NEXT: movi d0, #0000000000000000 +; CHECK-NEXT: mov w8, #1090519040 // =0x41000000 +; CHECK-NEXT: fmov s1, #1.00000000 +; CHECK-NEXT: fmov s2, #2.00000000 +; CHECK-NEXT: fmov s3, #3.00000000 +; CHECK-NEXT: fmov s4, #4.00000000 +; CHECK-NEXT: fmov s5, #5.00000000 +; CHECK-NEXT: fmov s6, #6.00000000 +; CHECK-NEXT: fmov s7, #7.00000000 +; CHECK-NEXT: add x0, sp, #16 +; CHECK-NEXT: str w8, [sp] +; CHECK-NEXT: bl func_f8_and_v0_passed_via_memory +; CHECK-NEXT: addvl sp, sp, #1 +; CHECK-NEXT: add sp, sp, #16 +; CHECK-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload +; CHECK-NEXT: ret + call void @func_f8_and_v0_passed_via_memory(float 0.0, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 9.000000e+00, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer)) + ret void +} + declare float @callee1(float, <vscale x 8 x double>, <vscale x 8 x double>, <vscale x 2 x double>) declare float @callee2(i32, i32, i32, i32, i32, i32, i32, i32, float, <vscale x 8 x double>, <vscale x 8 x double>) declare float @callee3(float, float, <vscale x 8 x double>, <vscale x 6 x double>, <vscale x 2 x double>) _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
