Author: Philipp Tomsich Date: 2022-05-11T16:16:13-07:00 New Revision: c6d56a324ef87668f109f738e3f51f8eb528c9dd
URL: https://github.com/llvm/llvm-project/commit/c6d56a324ef87668f109f738e3f51f8eb528c9dd DIFF: https://github.com/llvm/llvm-project/commit/c6d56a324ef87668f109f738e3f51f8eb528c9dd.diff LOG: [AArch64] Add native CPU detection for Ampere1 Map the IMPLEMENTOR ID 0xc0 (Ampere Computing) and CPU ID 0xac3 (Ampere1) to ampere1. Differential Revision: https://reviews.llvm.org/D117111 (cherry picked from commit 7e02bc5237751118efe36c41b0caf004aeed022f) Added: Modified: llvm/lib/Support/Host.cpp llvm/unittests/Support/Host.cpp Removed: ################################################################################ diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp index f6003b783245e..a82a4d451c8a3 100644 --- a/llvm/lib/Support/Host.cpp +++ b/llvm/lib/Support/Host.cpp @@ -296,6 +296,12 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef ProcCpuinfoContent) { } } + if (Implementer == "0xc0") { // Ampere Computing + return StringSwitch<const char *>(Part) + .Case("0xac3", "ampere1") + .Default("generic"); + } + return "generic"; } diff --git a/llvm/unittests/Support/Host.cpp b/llvm/unittests/Support/Host.cpp index 888cfb2658e42..6c1bbbc8ee58e 100644 --- a/llvm/unittests/Support/Host.cpp +++ b/llvm/unittests/Support/Host.cpp @@ -128,6 +128,10 @@ TEST(getLinuxHostCPUName, AArch64) { "CPU part : 0xc01"), "saphira"); + EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0xc0\n" + "CPU part : 0xac3"), + "ampere1"); + // MSM8992/4 weirdness StringRef MSM8992ProcCpuInfo = R"( Processor : AArch64 Processor rev 3 (aarch64) _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
