Author: Sanjay Patel Date: 2021-01-23T11:17:20-05:00 New Revision: 39e1e53a7c162652c6c138d1bcf50d2766fe9561
URL: https://github.com/llvm/llvm-project/commit/39e1e53a7c162652c6c138d1bcf50d2766fe9561 DIFF: https://github.com/llvm/llvm-project/commit/39e1e53a7c162652c6c138d1bcf50d2766fe9561.diff LOG: [SLP] add reduction test with mixed fast-math-flags; NFC Added: Modified: llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll Removed: ################################################################################ diff --git a/llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll b/llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll index 8e175f1acda9..38d36c676fa7 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll @@ -1801,4 +1801,36 @@ define float @fadd_v4f32_fmf(float* %p) { ret float %add3 } +define float @fadd_v4f32_fmf_intersect(float* %p) { +; CHECK-LABEL: @fadd_v4f32_fmf_intersect( +; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds float, float* [[P:%.*]], i64 1 +; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds float, float* [[P]], i64 2 +; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds float, float* [[P]], i64 3 +; CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[P]] to <4 x float>* +; CHECK-NEXT: [[TMP2:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> [[TMP2]]) +; CHECK-NEXT: ret float [[TMP3]] +; +; STORE-LABEL: @fadd_v4f32_fmf_intersect( +; STORE-NEXT: [[P1:%.*]] = getelementptr inbounds float, float* [[P:%.*]], i64 1 +; STORE-NEXT: [[P2:%.*]] = getelementptr inbounds float, float* [[P]], i64 2 +; STORE-NEXT: [[P3:%.*]] = getelementptr inbounds float, float* [[P]], i64 3 +; STORE-NEXT: [[TMP1:%.*]] = bitcast float* [[P]] to <4 x float>* +; STORE-NEXT: [[TMP2:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 4 +; STORE-NEXT: [[TMP3:%.*]] = call fast float @llvm.vector.reduce.fadd.v4f32(float -0.000000e+00, <4 x float> [[TMP2]]) +; STORE-NEXT: ret float [[TMP3]] +; + %p1 = getelementptr inbounds float, float* %p, i64 1 + %p2 = getelementptr inbounds float, float* %p, i64 2 + %p3 = getelementptr inbounds float, float* %p, i64 3 + %t0 = load float, float* %p, align 4 + %t1 = load float, float* %p1, align 4 + %t2 = load float, float* %p2, align 4 + %t3 = load float, float* %p3, align 4 + %add1 = fadd ninf reassoc nsz nnan float %t1, %t0 + %add2 = fadd ninf reassoc nsz nnan arcp float %t2, %add1 + %add3 = fadd ninf reassoc nsz contract float %t3, %add2 + ret float %add3 +} + declare i32 @__gxx_personality_v0(...) _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
