Author: Simon Pilgrim Date: 2021-01-21T12:38:36Z New Revision: 935bacd3a7244f04b7f39818e3fc589529474d13
URL: https://github.com/llvm/llvm-project/commit/935bacd3a7244f04b7f39818e3fc589529474d13 DIFF: https://github.com/llvm/llvm-project/commit/935bacd3a7244f04b7f39818e3fc589529474d13.diff LOG: [DAG] SimplifyDemandedBits - correctly adjust truncated shift amount type As noticed on D56387, for vectors we must always correctly adjust the shift amount type during truncation (not just after legalization). We were getting away with it as we currently only accepted scalars via the dyn_cast<ConstantSDNode>. Added: Modified: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp Removed: ################################################################################ diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index b19033e3e427..cac4d8fff8bb 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -2023,12 +2023,12 @@ bool TargetLowering::SimplifyDemandedBits( if (!(HighBits & DemandedBits)) { // None of the shifted in bits are needed. Add a truncate of the // shift input, then shift it. - if (TLO.LegalTypes()) - ShAmt = TLO.DAG.getConstant(ShVal, dl, getShiftAmountTy(VT, DL)); + SDValue NewShAmt = TLO.DAG.getConstant( + ShVal, dl, getShiftAmountTy(VT, DL, TLO.LegalTypes())); SDValue NewTrunc = TLO.DAG.getNode(ISD::TRUNCATE, dl, VT, Src.getOperand(0)); return TLO.CombineTo( - Op, TLO.DAG.getNode(ISD::SRL, dl, VT, NewTrunc, ShAmt)); + Op, TLO.DAG.getNode(ISD::SRL, dl, VT, NewTrunc, NewShAmt)); } break; } _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
