Author: Tim Northover Date: 2021-01-19T14:04:53Z New Revision: 6259fbd8b69531133d24b5367a6a2cd9b183ce48
URL: https://github.com/llvm/llvm-project/commit/6259fbd8b69531133d24b5367a6a2cd9b183ce48 DIFF: https://github.com/llvm/llvm-project/commit/6259fbd8b69531133d24b5367a6a2cd9b183ce48.diff LOG: AArch64: add apple-a14 as a CPU This CPU supports all v8.5a features except BTI, and so identifies as v8.5a to Clang. A bit weird, but the best way for things like xnu to detect the new features it cares about. Added: Modified: llvm/include/llvm/Support/AArch64TargetParser.def llvm/lib/Target/AArch64/AArch64.td llvm/lib/Target/AArch64/AArch64Subtarget.cpp llvm/lib/Target/AArch64/AArch64Subtarget.h llvm/unittests/Support/TargetParserTest.cpp Removed: ################################################################################ diff --git a/llvm/include/llvm/Support/AArch64TargetParser.def b/llvm/include/llvm/Support/AArch64TargetParser.def index 5f36b0eecff9..332fb555e824 100644 --- a/llvm/include/llvm/Support/AArch64TargetParser.def +++ b/llvm/include/llvm/Support/AArch64TargetParser.def @@ -189,6 +189,8 @@ AARCH64_CPU_NAME("apple-a12", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false, (AArch64::AEK_FP16)) AARCH64_CPU_NAME("apple-a13", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false, (AArch64::AEK_FP16 | AArch64::AEK_FP16FML)) +AARCH64_CPU_NAME("apple-a14", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false, + (AArch64::AEK_FP16 | AArch64::AEK_FP16FML)) AARCH64_CPU_NAME("apple-s4", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false, (AArch64::AEK_FP16)) AARCH64_CPU_NAME("apple-s5", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false, diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index 165939e6252b..15c7130b24f3 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -854,6 +854,38 @@ def ProcAppleA13 : SubtargetFeature<"apple-a13", "ARMProcFamily", "AppleA13", HasV8_4aOps ]>; +def ProcAppleA14 : SubtargetFeature<"apple-a14", "ARMProcFamily", "AppleA14", + "Apple A14", [ + FeatureAggressiveFMA, + FeatureAlternateSExtLoadCVTF32Pattern, + FeatureAltFPCmp, + FeatureArithmeticBccFusion, + FeatureArithmeticCbzFusion, + FeatureCrypto, + FeatureDisableLatencySchedHeuristic, + FeatureFPARMv8, + FeatureFRInt3264, + FeatureFuseAddress, + FeatureFuseAES, + FeatureFuseArithmeticLogic, + FeatureFuseCCSelect, + FeatureFuseCryptoEOR, + FeatureFuseLiterals, + FeatureNEON, + FeaturePerfMon, + FeatureSpecRestrict, + FeatureSSBS, + FeatureSB, + FeaturePredRes, + FeatureCacheDeepPersist, + FeatureZCRegMove, + FeatureZCZeroing, + FeatureFullFP16, + FeatureFP16FML, + FeatureSHA3, + HasV8_4aOps + ]>; + def ProcExynosM3 : SubtargetFeature<"exynosm3", "ARMProcFamily", "ExynosM3", "Samsung Exynos-M3 processors", [FeatureCRC, @@ -1147,6 +1179,7 @@ def : ProcessorModel<"apple-a10", CycloneModel, [ProcAppleA10]>; def : ProcessorModel<"apple-a11", CycloneModel, [ProcAppleA11]>; def : ProcessorModel<"apple-a12", CycloneModel, [ProcAppleA12]>; def : ProcessorModel<"apple-a13", CycloneModel, [ProcAppleA13]>; +def : ProcessorModel<"apple-a14", CycloneModel, [ProcAppleA14]>; // watch CPUs. def : ProcessorModel<"apple-s4", CycloneModel, [ProcAppleA12]>; diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp index 2a4a5954e4b6..71b2bb196486 100644 --- a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp +++ b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp @@ -122,6 +122,7 @@ void AArch64Subtarget::initializeProperties() { case AppleA11: case AppleA12: case AppleA13: + case AppleA14: CacheLineSize = 64; PrefetchDistance = 280; MinPrefetchStride = 2048; diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.h b/llvm/lib/Target/AArch64/AArch64Subtarget.h index a2abd609d49e..1b89b87d41d2 100644 --- a/llvm/lib/Target/AArch64/AArch64Subtarget.h +++ b/llvm/lib/Target/AArch64/AArch64Subtarget.h @@ -45,6 +45,7 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo { AppleA11, AppleA12, AppleA13, + AppleA14, Carmel, CortexA35, CortexA53, diff --git a/llvm/unittests/Support/TargetParserTest.cpp b/llvm/unittests/Support/TargetParserTest.cpp index a0c36f1ad6f1..7be133cf2c7a 100644 --- a/llvm/unittests/Support/TargetParserTest.cpp +++ b/llvm/unittests/Support/TargetParserTest.cpp @@ -1043,6 +1043,14 @@ INSTANTIATE_TEST_CASE_P( AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | AArch64::AEK_FP16FML, "8.4-A"), + ARMCPUTestParams("apple-a14", "armv8.5-a", "crypto-neon-fp-armv8", + AArch64::AEK_CRC | AArch64::AEK_CRYPTO | + AArch64::AEK_FP | AArch64::AEK_SIMD | + AArch64::AEK_LSE | AArch64::AEK_RAS | + AArch64::AEK_RDM | AArch64::AEK_RCPC | + AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | + AArch64::AEK_FP16FML, + "8.5-A"), ARMCPUTestParams("apple-s4", "armv8.3-a", "crypto-neon-fp-armv8", AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP | AArch64::AEK_SIMD | @@ -1166,7 +1174,7 @@ INSTANTIATE_TEST_CASE_P( AArch64::AEK_LSE | AArch64::AEK_RDM, "8.2-A")), ); -static constexpr unsigned NumAArch64CPUArchs = 46; +static constexpr unsigned NumAArch64CPUArchs = 47; TEST(TargetParserTest, testAArch64CPUArchList) { SmallVector<StringRef, NumAArch64CPUArchs> List; _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
