Author: Craig Topper Date: 2021-01-16T21:20:53-08:00 New Revision: 061f681c0dfa4d279dc656802bf81f3b9bfa3d34
URL: https://github.com/llvm/llvm-project/commit/061f681c0dfa4d279dc656802bf81f3b9bfa3d34 DIFF: https://github.com/llvm/llvm-project/commit/061f681c0dfa4d279dc656802bf81f3b9bfa3d34.diff LOG: [RISCV] Remove an extra map lookup from RISCVCompressInstEmitter. NFC When we looked up the map to see if the entry already existed, this created the new entry for us. So save a reference to it so we can use it to update the entry instead of looking it up again. Also remove unnecessary StringRef constructors around string literals on calls to this function. Added: Modified: llvm/utils/TableGen/RISCVCompressInstEmitter.cpp Removed: ################################################################################ diff --git a/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp b/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp index 8f781c91f461..beb9266d62ab 100644 --- a/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp +++ b/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp @@ -509,14 +509,13 @@ getReqFeatures(std::set<std::pair<bool, StringRef>> &FeaturesSet, static unsigned getPredicates(DenseMap<const Record *, unsigned> &PredicateMap, std::vector<const Record *> &Predicates, Record *Rec, StringRef Name) { - unsigned Entry = PredicateMap[Rec]; + unsigned &Entry = PredicateMap[Rec]; if (Entry) return Entry; if (!Rec->isValueUnset(Name)) { Predicates.push_back(Rec); Entry = Predicates.size(); - PredicateMap[Rec] = Entry; return Entry; } @@ -751,14 +750,16 @@ void RISCVCompressInstEmitter::emitCompressInstEmitter(raw_ostream &o, } else { // Handling immediate operands. if (CompressOrUncompress) { - unsigned Entry = getPredicates(MCOpPredicateMap, MCOpPredicates, - DestOperand.Rec, StringRef("MCOperandPredicate")); + unsigned Entry = + getPredicates(MCOpPredicateMap, MCOpPredicates, DestOperand.Rec, + "MCOperandPredicate"); CondStream.indent(6) << Namespace << "ValidateMCOperand(" << "MI.getOperand(" << OpIdx << "), STI, " << Entry << ") &&\n"; } else { - unsigned Entry = getPredicates(ImmLeafPredicateMap, ImmLeafPredicates, - DestOperand.Rec, StringRef("ImmediateCode")); + unsigned Entry = + getPredicates(ImmLeafPredicateMap, ImmLeafPredicates, + DestOperand.Rec, "ImmediateCode"); CondStream.indent(6) << "MI.getOperand(" << OpIdx << ").isImm() &&\n"; CondStream.indent(6) << Namespace << "ValidateMachineOperand(" @@ -774,14 +775,14 @@ void RISCVCompressInstEmitter::emitCompressInstEmitter(raw_ostream &o, case OpData::Imm: { if (CompressOrUncompress) { unsigned Entry = getPredicates(MCOpPredicateMap, MCOpPredicates, - DestOperand.Rec, StringRef("MCOperandPredicate")); + DestOperand.Rec, "MCOperandPredicate"); CondStream.indent(6) << Namespace << "ValidateMCOperand(" << "MCOperand::createImm(" << DestOperandMap[OpNo].Data.Imm << "), STI, " << Entry << ") &&\n"; } else { unsigned Entry = getPredicates(ImmLeafPredicateMap, ImmLeafPredicates, - DestOperand.Rec, StringRef("ImmediateCode")); + DestOperand.Rec, "ImmediateCode"); CondStream.indent(6) << Namespace << "ValidateMachineOperand(MachineOperand::CreateImm(" _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
