Author: David Stuttard Date: 2021-01-11T11:24:09-08:00 New Revision: 5464baaae8c19997c5b0b76930d2b5ee13f68dfa
URL: https://github.com/llvm/llvm-project/commit/5464baaae8c19997c5b0b76930d2b5ee13f68dfa DIFF: https://github.com/llvm/llvm-project/commit/5464baaae8c19997c5b0b76930d2b5ee13f68dfa.diff LOG: Fix minor build issue (NFC) Change [x86] Fix tile register spill issue was causing problems for our build using gcc-5.4.1 The problem was caused by this line: for (const MachineInstr &MI : make_range(MIS.begin(), MI)) where MI was previously defined as a MachineBasicBlock iterator. Differential Revision: https://reviews.llvm.org/D94415 Added: Modified: llvm/lib/CodeGen/InlineSpiller.cpp Removed: ################################################################################ diff --git a/llvm/lib/CodeGen/InlineSpiller.cpp b/llvm/lib/CodeGen/InlineSpiller.cpp index 81ab9e5ab738..236a70904690 100644 --- a/llvm/lib/CodeGen/InlineSpiller.cpp +++ b/llvm/lib/CodeGen/InlineSpiller.cpp @@ -1553,12 +1553,12 @@ void HoistSpillHelper::hoistAllSpills() { for (auto const &Insert : SpillsToIns) { MachineBasicBlock *BB = Insert.first; Register LiveReg = Insert.second; - MachineBasicBlock::iterator MI = IPA.getLastInsertPointIter(OrigLI, *BB); - MachineInstrSpan MIS(MI, BB); - TII.storeRegToStackSlot(*BB, MI, LiveReg, false, Slot, + MachineBasicBlock::iterator MII = IPA.getLastInsertPointIter(OrigLI, *BB); + MachineInstrSpan MIS(MII, BB); + TII.storeRegToStackSlot(*BB, MII, LiveReg, false, Slot, MRI.getRegClass(LiveReg), &TRI); - LIS.InsertMachineInstrRangeInMaps(MIS.begin(), MI); - for (const MachineInstr &MI : make_range(MIS.begin(), MI)) + LIS.InsertMachineInstrRangeInMaps(MIS.begin(), MII); + for (const MachineInstr &MI : make_range(MIS.begin(), MII)) getVDefInterval(MI, LIS); ++NumSpills; } _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
