Author: Kazu Hirata Date: 2021-01-03T09:57:45-08:00 New Revision: 0e219b6443b2a1359cf0096e96b1e74eb60613fc
URL: https://github.com/llvm/llvm-project/commit/0e219b6443b2a1359cf0096e96b1e74eb60613fc DIFF: https://github.com/llvm/llvm-project/commit/0e219b6443b2a1359cf0096e96b1e74eb60613fc.diff LOG: [Target] Construct SmallVector with iterator ranges (NFC) Added: Modified: llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp llvm/lib/Target/AMDGPU/SIISelLowering.cpp llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp llvm/lib/Target/ARM/ARMISelLowering.cpp llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp Removed: ################################################################################ diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp index b7862f6ef9a4..033fdc7b0886 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp @@ -920,7 +920,7 @@ static Value *simplifyAMDGCNMemoryIntrinsicDemanded(InstCombiner &IC, IC.Builder.SetInsertPoint(&II); // Assume the arguments are unchanged and later override them, if needed. - SmallVector<Value *, 16> Args(II.arg_begin(), II.arg_end()); + SmallVector<Value *, 16> Args(II.args()); if (DMaskIdx < 0) { // Buffer case. diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp index d6c151d3d2cc..46ee2eb2ed0f 100644 --- a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp +++ b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp @@ -364,8 +364,7 @@ bool searchPredecessors(const MachineBasicBlock *MBB, return false; DenseSet<const MachineBasicBlock *> Visited; - SmallVector<MachineBasicBlock *, 4> Worklist(MBB->pred_begin(), - MBB->pred_end()); + SmallVector<MachineBasicBlock *, 4> Worklist(MBB->predecessors()); while (!Worklist.empty()) { MachineBasicBlock *MBB = Worklist.pop_back_val(); diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index c7abc585d0d1..ea22e0fa16ab 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -6001,8 +6001,8 @@ SDValue SITargetLowering::lowerImage(SDValue Op, unsigned IntrOpcode = Intr->BaseOpcode; bool IsGFX10Plus = AMDGPU::isGFX10Plus(*Subtarget); - SmallVector<EVT, 3> ResultTypes(Op->value_begin(), Op->value_end()); - SmallVector<EVT, 3> OrigResultTypes(Op->value_begin(), Op->value_end()); + SmallVector<EVT, 3> ResultTypes(Op->values()); + SmallVector<EVT, 3> OrigResultTypes(Op->values()); bool IsD16 = false; bool IsG16 = false; bool IsA16 = false; diff --git a/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp b/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp index 563a52f997dd..6366fcff6637 100644 --- a/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp +++ b/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp @@ -181,8 +181,7 @@ char &llvm::SILowerControlFlowID = SILowerControlFlow::ID; static bool hasKill(const MachineBasicBlock *Begin, const MachineBasicBlock *End, const SIInstrInfo *TII) { DenseSet<const MachineBasicBlock*> Visited; - SmallVector<MachineBasicBlock *, 4> Worklist(Begin->succ_begin(), - Begin->succ_end()); + SmallVector<MachineBasicBlock *, 4> Worklist(Begin->successors()); while (!Worklist.empty()) { MachineBasicBlock *MBB = Worklist.pop_back_val(); diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index a50bb623092a..6eb1bdffdac4 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -10401,8 +10401,7 @@ void ARMTargetLowering::EmitSjLjDispatchBlock(MachineInstr &MI, // Remove the landing pad successor from the invoke block and replace it // with the new dispatch block. - SmallVector<MachineBasicBlock*, 4> Successors(BB->succ_begin(), - BB->succ_end()); + SmallVector<MachineBasicBlock*, 4> Successors(BB->successors()); while (!Successors.empty()) { MachineBasicBlock *SMBB = Successors.pop_back_val(); if (SMBB->isEHPad()) { diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp index b556af84f140..0dc0afe271d1 100644 --- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp +++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp @@ -2000,8 +2000,7 @@ void ARMTTIImpl::getUnrollingPreferences(Loop *L, ScalarEvolution &SE, return; } - SmallVector<const Value*, 4> Operands(I.value_op_begin(), - I.value_op_end()); + SmallVector<const Value*, 4> Operands(I.operand_values()); Cost += getUserCost(&I, Operands, TargetTransformInfo::TCK_SizeAndLatency); } diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp index 346938daf1aa..d9c2ba6a6537 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp @@ -98,8 +98,7 @@ static void eraseDeadBBsAndChildren(const Container &MBBs) { MachineBasicBlock *MBB = WL.pop_back_val(); if (!MBB->pred_empty()) continue; - SmallVector<MachineBasicBlock *, 4> Succs(MBB->succ_begin(), - MBB->succ_end()); + SmallVector<MachineBasicBlock *, 4> Succs(MBB->successors()); WL.append(MBB->succ_begin(), MBB->succ_end()); for (auto *Succ : Succs) MBB->removeSuccessor(Succ); @@ -220,8 +219,7 @@ bool WebAssemblyLateEHPrepare::removeUnnecessaryUnreachables( // because throw itself is a terminator, and also delete successors if // any. MBB.erase(std::next(MI.getIterator()), MBB.end()); - SmallVector<MachineBasicBlock *, 8> Succs(MBB.succ_begin(), - MBB.succ_end()); + SmallVector<MachineBasicBlock *, 8> Succs(MBB.successors()); for (auto *Succ : Succs) if (!Succ->isEHPad()) MBB.removeSuccessor(Succ); diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp index d4736a20c12c..d3bbadf27478 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp @@ -811,7 +811,7 @@ bool WebAssemblyLowerEmscriptenEHSjLj::runEHOnFunction(Function &F) { } else { // This can't throw, and we don't need this invoke, just replace it with a // call+branch - SmallVector<Value *, 16> Args(II->arg_begin(), II->arg_end()); + SmallVector<Value *, 16> Args(II->args()); CallInst *NewCall = IRB.CreateCall(II->getFunctionType(), II->getCalledOperand(), Args); NewCall->takeName(II); diff --git a/llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp b/llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp index 83fc16ed98fc..bd269f7f4c43 100644 --- a/llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp +++ b/llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp @@ -80,7 +80,7 @@ createReplacementInstr(ConstantExpr *CE, Instruction *Instr) { unsigned OpCode = CE->getOpcode(); switch (OpCode) { case Instruction::GetElementPtr: { - SmallVector<Value *,4> CEOpVec(CE->op_begin(), CE->op_end()); + SmallVector<Value *, 4> CEOpVec(CE->operands()); ArrayRef<Value *> CEOps(CEOpVec); return dyn_cast<Instruction>(Builder.CreateInBoundsGEP( cast<GEPOperator>(CE)->getSourceElementType(), CEOps[0], @@ -128,7 +128,7 @@ createReplacementInstr(ConstantExpr *CE, Instruction *Instr) { static bool replaceConstantExprOp(ConstantExpr *CE, Pass *P) { do { - SmallVector<WeakTrackingVH, 8> WUsers(CE->user_begin(), CE->user_end()); + SmallVector<WeakTrackingVH, 8> WUsers(CE->users()); llvm::sort(WUsers); WUsers.erase(std::unique(WUsers.begin(), WUsers.end()), WUsers.end()); while (!WUsers.empty()) @@ -201,7 +201,7 @@ bool XCoreLowerThreadLocal::lowerGlobal(GlobalVariable *GV) { GV->isExternallyInitialized()); // Update uses. - SmallVector<User *, 16> Users(GV->user_begin(), GV->user_end()); + SmallVector<User *, 16> Users(GV->users()); for (unsigned I = 0, E = Users.size(); I != E; ++I) { User *U = Users[I]; Instruction *Inst = cast<Instruction>(U); _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
