Author: Fangrui Song Date: 2020-12-05T23:13:28-08:00 New Revision: 687b83ceabafe81970cd4639e7f0c89036402081
URL: https://github.com/llvm/llvm-project/commit/687b83ceabafe81970cd4639e7f0c89036402081 DIFF: https://github.com/llvm/llvm-project/commit/687b83ceabafe81970cd4639e7f0c89036402081.diff LOG: [X86FastISel] Fix MO_GOTPCREL GlobalValue reference in static relocation model This fixes the bug referenced by 5582a7987662a92eda5d883b88fc4586e755acf5 which was exposed by 961f31d8ad14c66829991522d73e14b5a96ff6d4. With this change, `movq src@GOTPCREL, %rcx` => `movq src@GOTPCREL(%rip), %rcx` Added: Modified: llvm/lib/Target/X86/X86FastISel.cpp llvm/test/CodeGen/X86/fast-isel-mem.ll Removed: ################################################################################ diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp index a8db3d416c2e..caf158102230 100644 --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -784,7 +784,7 @@ bool X86FastISel::handleConstantAddresses(const Value *V, X86AddressMode &AM) { RC = &X86::GR32RegClass; } - if (Subtarget->isPICStyleRIPRel()) + if (Subtarget->isPICStyleRIPRel() || GVFlags == X86II::MO_GOTPCREL) StubAM.Base.Reg = X86::RIP; LoadReg = createResultReg(RC); diff --git a/llvm/test/CodeGen/X86/fast-isel-mem.ll b/llvm/test/CodeGen/X86/fast-isel-mem.ll index 3f1d9cae9340..42f210199e64 100644 --- a/llvm/test/CodeGen/X86/fast-isel-mem.ll +++ b/llvm/test/CodeGen/X86/fast-isel-mem.ll @@ -1,7 +1,8 @@ ; RUN: llc < %s -fast-isel -mtriple=i386-apple-darwin -mcpu=generic | FileCheck %s ; RUN: llc < %s -fast-isel -mtriple=i386-apple-darwin -mcpu=atom | FileCheck -check-prefix=ATOM %s +; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64 | FileCheck -check-prefix=ELF64 %s -@src = external global i32 +@src = external dso_preemptable global i32 ; rdar://6653118 define i32 @loadgv() nounwind { @@ -26,6 +27,14 @@ entry: ; ATOM: movl %eax, (%ecx) ; ATOM: ret +;; dso_preemptable src is loaded via GOT indirection. +; ELF64-LABEL: loadgv: +; ELF64: movq src@GOTPCREL(%rip), %rcx +; ELF64-NEXT: movl (%rcx), %eax +; ELF64-NEXT: addl (%rcx), %eax +; ELF64-NEXT: movl %eax, (%rcx) +; ELF64-NEXT: retq + } %stuff = type { i32 (...)** } _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
