Author: Max Kazantsev Date: 2020-12-03T18:01:41+07:00 New Revision: 4bd35cdc3ae1874c6d070c5d410b3f591de54ee6
URL: https://github.com/llvm/llvm-project/commit/4bd35cdc3ae1874c6d070c5d410b3f591de54ee6 DIFF: https://github.com/llvm/llvm-project/commit/4bd35cdc3ae1874c6d070c5d410b3f591de54ee6.diff LOG: Revert "[IndVars] ICmpInst should not prevent IV widening" This reverts commit 0c9c6ddf17bb01ae350a899b3395bb078aa0c62e. We are seeing some failures with this patch locally. Not clear if it's causing them or just triggering a problem in another place. Reverting while investigating. Added: Modified: llvm/lib/Transforms/Utils/SimplifyIndVar.cpp llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll Removed: ################################################################################ diff --git a/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp b/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp index e281c66a4267..d37fe74a0039 100644 --- a/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp +++ b/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp @@ -1541,14 +1541,10 @@ bool WidenIV::widenWithVariantUse(WidenIV::NarrowIVDefUse DU) { bool CanZeroExtend = ExtKind == ZeroExtended && OBO->hasNoUnsignedWrap(); auto AnotherOpExtKind = ExtKind; - // Check that all uses are either: - // - narrow def (in case of we are widening the IV increment); - // - single-input LCSSA Phis; - // - comparison of the chosen type; - // - extend of the chosen type (raison d'etre). + // Check that all uses are either s/zext, or narrow def (in case of we are + // widening the IV increment), or single-input LCSSA Phis. SmallVector<Instruction *, 4> ExtUsers; SmallVector<PHINode *, 4> LCSSAPhiUsers; - SmallVector<ICmpInst *, 4> ICmpUsers; for (Use &U : NarrowUse->uses()) { Instruction *User = cast<Instruction>(U.getUser()); if (User == NarrowDef) @@ -1562,19 +1558,6 @@ bool WidenIV::widenWithVariantUse(WidenIV::NarrowIVDefUse DU) { LCSSAPhiUsers.push_back(LCSSAPhi); continue; } - if (auto *ICmp = dyn_cast<ICmpInst>(User)) { - auto Pred = ICmp->getPredicate(); - // We have 3 types of predicates: signed, unsigned and equality - // predicates. For equality, it's legal to widen icmp for either sign and - // zero extend. For sign extend, we can also do so for signed predicates, - // likeweise for zero extend we can widen icmp for unsigned predicates. - if (ExtKind == ZeroExtended && ICmpInst::isSigned(Pred)) - return false; - if (ExtKind == SignExtended && ICmpInst::isUnsigned(Pred)) - return false; - ICmpUsers.push_back(ICmp); - continue; - } if (ExtKind == SignExtended) User = dyn_cast<SExtInst>(User); else @@ -1672,26 +1655,6 @@ bool WidenIV::widenWithVariantUse(WidenIV::NarrowIVDefUse DU) { User->replaceAllUsesWith(TruncPN); DeadInsts.emplace_back(User); } - - for (ICmpInst *User : ICmpUsers) { - Builder.SetInsertPoint(User); - auto ExtendedOp = [&](Value * V)->Value * { - if (V == NarrowUse) - return WideBO; - if (ExtKind == ZeroExtended) - return Builder.CreateZExt(V, WideBO->getType()); - else - return Builder.CreateSExt(V, WideBO->getType()); - }; - auto Pred = User->getPredicate(); - auto *LHS = ExtendedOp(User->getOperand(0)); - auto *RHS = ExtendedOp(User->getOperand(1)); - auto *WideCmp = - Builder.CreateICmp(Pred, LHS, RHS, User->getName() + ".wide"); - User->replaceAllUsesWith(WideCmp); - DeadInsts.emplace_back(User); - } - return true; } diff --git a/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll b/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll index 94cd63257cf4..72e97682274e 100644 --- a/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll +++ b/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll @@ -795,36 +795,37 @@ failure: unreachable } +; TODO: We can widen here despite the icmp user of %foo in guarded block. define i32 @test16_unsigned_pos1(i32 %start, i32* %p, i32* %q, i32 %x) { ; CHECK-LABEL: @test16_unsigned_pos1( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64 -; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[TMP0]], -1 -; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[X:%.*]] to i64 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[START]], -1 ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ] ; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0 -; CHECK-NEXT: [[TMP3:%.*]] = add nsw i64 [[INDVARS_IV]], -1 +; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVARS_IV]] to i32 +; CHECK-NEXT: [[FOO:%.*]] = add i32 [[TMP2]], -1 ; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]] ; CHECK: guarded: -; CHECK-NEXT: [[ICMP_USER_WIDE4:%.*]] = icmp ult i64 [[TMP1]], [[TMP2]] -; CHECK-NEXT: br i1 [[ICMP_USER_WIDE4]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]] +; CHECK-NEXT: [[ICMP_USER3:%.*]] = icmp ult i32 [[TMP1]], [[X:%.*]] +; CHECK-NEXT: br i1 [[ICMP_USER3]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]] ; CHECK: backedge: -; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[TMP3]] +; CHECK-NEXT: [[INDEX:%.*]] = zext i32 [[FOO]] to i64 +; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]] ; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4 -; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q:%.*]], align 4 +; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]] +; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4 ; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1 ; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]] ; CHECK: exit: -; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 -1 to i32 -; CHECK-NEXT: call void @use(i32 [[TMP4]]) -; CHECK-NEXT: ret i32 [[TMP4]] +; CHECK-NEXT: call void @use(i32 -1) +; CHECK-NEXT: ret i32 -1 ; CHECK: failure: -; CHECK-NEXT: [[FOO_LCSSA2_WIDE:%.*]] = phi i64 [ [[TMP3]], [[BACKEDGE]] ] -; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[FOO_LCSSA2_WIDE]] to i32 -; CHECK-NEXT: call void @use(i32 [[TMP5]]) +; CHECK-NEXT: [[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ] +; CHECK-NEXT: call void @use(i32 [[FOO_LCSSA2]]) ; CHECK-NEXT: unreachable ; CHECK: side_exit: ; CHECK-NEXT: ret i32 0 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
