Author: Ahsan Saghir Date: 2020-10-01T13:28:35-05:00 New Revision: 636ecdd147911fa9b51b84308734676ef815ca13
URL: https://github.com/llvm/llvm-project/commit/636ecdd147911fa9b51b84308734676ef815ca13 DIFF: https://github.com/llvm/llvm-project/commit/636ecdd147911fa9b51b84308734676ef815ca13.diff LOG: Fix indentation for PowerPC ReleaseNotes Added: Modified: llvm/docs/ReleaseNotes.rst Removed: ################################################################################ diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst index bd6bbca75d9e..a1f00a1a3b3a 100644 --- a/llvm/docs/ReleaseNotes.rst +++ b/llvm/docs/ReleaseNotes.rst @@ -178,24 +178,33 @@ Optimization: Codegen: * POWER10 support -* Added PC Relative addressing -* Added __int128 vector bool support + + * Added PC Relative addressing + * Added __int128 vector bool support + * Security enhancement via probe-stack attribute support to protect against stack clash * Floating point support enhancements -* Improved half precision and quad precision support, including GLIBC -* constrained FP operation support for arithmetic/rounding/max/min -* cleaning up fast math flags checks in DAGCombine, Legalizer, and Lowering + + * Improved half precision and quad precision support, including GLIBC + * constrained FP operation support for arithmetic/rounding/max/min + * cleaning up fast math flags checks in DAGCombine, Legalizer, and Lowering + * Performance improvements from instruction exploitation, especially for vector permute on LE * Scheduling enhancements -* Added MacroFusion for POWER8 -* Added post-ra heuristics for POWER9 + + * Added MacroFusion for POWER8 + * Added post-ra heuristics for POWER9 + * Target dependent passes tuning -* Updated LoopStrengthReduce to use instruction number as first priority -* Enhanced MachineCombiner to expose more ILP + + * Updated LoopStrengthReduce to use instruction number as first priority + * Enhanced MachineCombiner to expose more ILP + * Code quality and maintenance enhancements -* Enabled more machine verification passes -* Added ability to parse and emit additional extended mnemonics -* Numerous bug fixes + + * Enabled more machine verification passes + * Added ability to parse and emit additional extended mnemonics + * Numerous bug fixes AIX Support Improvements: _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
