Author: tstellar Date: Thu Jun 2 16:01:43 2016 New Revision: 271591 URL: http://llvm.org/viewvc/llvm-project?rev=271591&view=rev Log: Merging part of r259297:
We need to correctly initialize the AMDGPUPromoteAlloca pass, because later commits will add tests that try to pass the -amdgpu-promote-alloca flag to opt. Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.h llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.h URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.h?rev=271591&r1=271590&r2=271591&view=diff ============================================================================== --- llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.h (original) +++ llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.h Thu Jun 2 16:01:43 2016 @@ -70,7 +70,10 @@ void initializeSILoadStoreOptimizerPass( extern char &SILoadStoreOptimizerID; // Passes common to R600 and SI -FunctionPass *createAMDGPUPromoteAlloca(const AMDGPUSubtarget &ST); +FunctionPass *createAMDGPUPromoteAlloca(const TargetMachine *TM = nullptr); +void initializeAMDGPUPromoteAllocaPass(PassRegistry&); +extern char &AMDGPUPromoteAllocaID; + Pass *createAMDGPUStructurizeCFGPass(); FunctionPass *createAMDGPUISelDag(TargetMachine &tm); ModulePass *createAMDGPUAlwaysInlinePass(); Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp?rev=271591&r1=271590&r2=271591&view=diff ============================================================================== --- llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp (original) +++ llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp Thu Jun 2 16:01:43 2016 @@ -27,16 +27,21 @@ using namespace llvm; namespace { class AMDGPUPromoteAlloca : public FunctionPass, - public InstVisitor<AMDGPUPromoteAlloca> { - - static char ID; + public InstVisitor<AMDGPUPromoteAlloca> { +private: + const TargetMachine *TM; Module *Mod; - const AMDGPUSubtarget &ST; int LocalMemAvailable; public: - AMDGPUPromoteAlloca(const AMDGPUSubtarget &st) : FunctionPass(ID), ST(st), - LocalMemAvailable(0) { } + static char ID; + + AMDGPUPromoteAlloca(const TargetMachine *TM_ = nullptr) : + FunctionPass(ID), + TM (TM_), + Mod(nullptr), + LocalMemAvailable(0) { } + bool doInitialization(Module &M) override; bool runOnFunction(Function &F) override; const char *getPassName() const override { return "AMDGPU Promote Alloca"; } @@ -47,12 +52,24 @@ public: char AMDGPUPromoteAlloca::ID = 0; +INITIALIZE_TM_PASS(AMDGPUPromoteAlloca, DEBUG_TYPE, + "AMDGPU promote alloca to vector or LDS", false, false) + +char &llvm::AMDGPUPromoteAllocaID = AMDGPUPromoteAlloca::ID; + bool AMDGPUPromoteAlloca::doInitialization(Module &M) { + if (!TM) + return false; + Mod = &M; return false; } bool AMDGPUPromoteAlloca::runOnFunction(Function &F) { + if (!TM) + return false; + + const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(F); FunctionType *FTy = F.getFunctionType(); @@ -428,6 +445,6 @@ void AMDGPUPromoteAlloca::visitAlloca(Al } } -FunctionPass *llvm::createAMDGPUPromoteAlloca(const AMDGPUSubtarget &ST) { - return new AMDGPUPromoteAlloca(ST); +FunctionPass *llvm::createAMDGPUPromoteAlloca(const TargetMachine *TM) { + return new AMDGPUPromoteAlloca(TM); } Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp?rev=271591&r1=271590&r2=271591&view=diff ============================================================================== --- llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (original) +++ llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp Thu Jun 2 16:01:43 2016 @@ -52,6 +52,7 @@ extern "C" void LLVMInitializeAMDGPUTarg initializeSILoadStoreOptimizerPass(*PR); initializeAMDGPUAnnotateKernelFeaturesPass(*PR); initializeAMDGPUAnnotateUniformValuesPass(*PR); + initializeAMDGPUPromoteAllocaPass(*PR); initializeSIAnnotateControlFlowPass(*PR); } @@ -228,7 +229,7 @@ void AMDGPUPassConfig::addIRPasses() { void AMDGPUPassConfig::addCodeGenPrepare() { const AMDGPUSubtarget &ST = *getAMDGPUTargetMachine().getSubtargetImpl(); if (ST.isPromoteAllocaEnabled()) { - addPass(createAMDGPUPromoteAlloca(ST)); + addPass(createAMDGPUPromoteAlloca(TM)); addPass(createSROAPass()); } TargetPassConfig::addCodeGenPrepare(); _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits