================
@@ -471,6 +498,18 @@ static void SetupTargetOpts(CompilerInstance &compiler,
// Set the target ABI
if (std::string abi = GetClangTargetABI(target_arch); !abi.empty())
compiler.getTargetOpts().ABI = std::move(abi);
+
+ if ((target_machine == llvm::Triple::riscv64 &&
+ compiler.getTargetOpts().ABI == "lp64f") ||
+ (target_machine == llvm::Triple::riscv32 &&
+ compiler.getTargetOpts().ABI == "ilp32f"))
+ compiler->getTargetOpts().FeaturesAsWritten.emplace_back("+f");
+
+ if ((target_machine == llvm::Triple::riscv64 &&
+ compiler.getTargetOpts().ABI == "lp64d") ||
+ (target_machine == llvm::Triple::riscv32 &&
+ compiler.getTargetOpts().ABI == "ilp32d"))
+ compiler->getTargetOpts().FeaturesAsWritten.emplace_back("+d");
----------------
dlav-sc wrote:
> What happens if we just unconditionally add +d and +f? My thinking is that we
> could maybe just enable these features for all RISCV targets (like we do with
> x86 sse?)
To be honest I don't know exactly, but I think it is a bad idea, because some
RISCV targets may not support float/double instructions (F/D extension), while
MCJIT will create hard-float instructions.
> I'm not super familiar with RISCV but are ilp32d/ilp32f/ilp64f/ilp32f all the
> supported ABI strings?
Nope, there is ilp32/lp64 for example, that don't support doubles instructions,
so the first problem was that MCJIT used ilp32/lp64 ABIs by default, so there
weren't any float or double instructions in the resulting assembly. Now I set
ABI according to the one in the debuggee binary.
https://github.com/llvm/llvm-project/pull/99336
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