================ @@ -757,7 +757,8 @@ void USRGenerator::VisitType(QualType T) { case BuiltinType::OCLReserveID: Out << "@BT@OCLReserveID"; break; case BuiltinType::OCLSampler: - Out << "@BT@OCLSampler"; break; + Out << "@BT@OCLSampler"; + break; ---------------- python3kgae wrote:
Is this expected? https://github.com/llvm/llvm-project/pull/97362 _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits