Author: David Spickett Date: 2024-04-03T15:05:13Z New Revision: 7c178fdf0094afbf4757d71b792bc159ddcac72f
URL: https://github.com/llvm/llvm-project/commit/7c178fdf0094afbf4757d71b792bc159ddcac72f DIFF: https://github.com/llvm/llvm-project/commit/7c178fdf0094afbf4757d71b792bc159ddcac72f.diff LOG: [lldb] Correct byte order check for 128 bit integer registers Size was clearly not correct here. This call has been here since the initial reformat of all of lldb so it has likely always been incorrect. (although registers don't typically have an endian, they are just values, in the remote protocol register data is in target endian) This might have been a problem for Neon registers on big endian AArch64, but only if the debug server describes them as integers. lldb-server does not, they've always been vectors which doesn't take this code path. Not adding a test because the way I've mocked up a big endian target in the past is using s390x as the architecture. This apparently has some form of vector extension that may be 128 bit but lldb doesn't support it. Added: Modified: lldb/source/Utility/RegisterValue.cpp Removed: ################################################################################ diff --git a/lldb/source/Utility/RegisterValue.cpp b/lldb/source/Utility/RegisterValue.cpp index fa92ba8a8f9236..cbf840258302d2 100644 --- a/lldb/source/Utility/RegisterValue.cpp +++ b/lldb/source/Utility/RegisterValue.cpp @@ -199,7 +199,7 @@ Status RegisterValue::SetValueFromData(const RegisterInfo ®_info, else if (reg_info.byte_size <= 16) { uint64_t data1 = src.GetU64(&src_offset); uint64_t data2 = src.GetU64(&src_offset); - if (src.GetByteSize() == eByteOrderBig) { + if (src.GetByteOrder() == eByteOrderBig) { int128.x[0] = data1; int128.x[1] = data2; } else { _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
