https://github.com/MaskRay updated https://github.com/llvm/llvm-project/pull/78950
>From 2ce57488682873d2dc005144db57fbb555f29d8a Mon Sep 17 00:00:00 2001 From: Fangrui Song <i...@maskray.me> Date: Mon, 22 Jan 2024 00:29:09 -0800 Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?= =?UTF-8?q?l=20version?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Created using spr 1.3.4 --- llvm/lib/Target/ARM/Thumb1InstrInfo.cpp | 5 ++-- llvm/lib/Target/ARM/Thumb2InstrInfo.cpp | 2 +- llvm/test/CodeGen/ARM/stack-guard-elf.ll | 30 +++++++++++++++++++----- 3 files changed, 28 insertions(+), 9 deletions(-) diff --git a/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp b/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp index e2f3fad2007904..e3104e8ee765f9 100644 --- a/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp +++ b/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp @@ -135,14 +135,15 @@ void Thumb1InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, void Thumb1InstrInfo::expandLoadStackGuard( MachineBasicBlock::iterator MI) const { MachineFunction &MF = *MI->getParent()->getParent(); - const TargetMachine &TM = MF.getTarget(); const ARMSubtarget &ST = MF.getSubtarget<ARMSubtarget>(); + const GlobalValue *GV = + cast<GlobalValue>((*MI->memoperands_begin())->getValue()); assert(MF.getFunction().getParent()->getStackProtectorGuard() != "tls" && "TLS stack protector not supported for Thumb1 targets"); unsigned Instr; - if (TM.isPositionIndependent()) + if (!GV->isDSOLocal()) Instr = ARM::tLDRLIT_ga_pcrel; else if (ST.genExecuteOnly() && ST.hasV8MBaselineOps()) Instr = ARM::t2MOVi32imm; diff --git a/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp b/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp index 2ea0eaa0aad8f5..9e4b51616b56ec 100644 --- a/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp +++ b/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp @@ -264,7 +264,7 @@ void Thumb2InstrInfo::expandLoadStackGuard( const GlobalValue *GV = cast<GlobalValue>((*MI->memoperands_begin())->getValue()); - if (MF.getSubtarget<ARMSubtarget>().isGVInGOT(GV)) + if (!GV->isDSOLocal()) expandLoadStackGuardBase(MI, ARM::t2LDRLIT_ga_pcrel, ARM::t2LDRi12); else if (MF.getTarget().isPositionIndependent()) expandLoadStackGuardBase(MI, ARM::t2MOV_ga_pcrel, ARM::t2LDRi12); diff --git a/llvm/test/CodeGen/ARM/stack-guard-elf.ll b/llvm/test/CodeGen/ARM/stack-guard-elf.ll index 250f2ad9ed1093..d0e5db7e5711b0 100644 --- a/llvm/test/CodeGen/ARM/stack-guard-elf.ll +++ b/llvm/test/CodeGen/ARM/stack-guard-elf.ll @@ -59,6 +59,8 @@ define i32 @test1() #0 { ; THUMB1-NEXT: .pad #16 ; THUMB1-NEXT: sub sp, #16 ; THUMB1-NEXT: ldr r0, .LCPI0_0 +; THUMB1-NEXT: .LPC0_0: +; THUMB1-NEXT: add r0, pc ; THUMB1-NEXT: ldr r0, [r0] ; THUMB1-NEXT: ldr r0, [r0] ; THUMB1-NEXT: add r1, sp, #904 @@ -67,7 +69,9 @@ define i32 @test1() #0 { ; THUMB1-NEXT: bl foo ; THUMB1-NEXT: add r0, sp, #904 ; THUMB1-NEXT: ldr r0, [r0, #124] -; THUMB1-NEXT: ldr r1, .LCPI0_0 +; THUMB1-NEXT: ldr r1, .LCPI0_1 +; THUMB1-NEXT: .LPC0_1: +; THUMB1-NEXT: add r1, pc ; THUMB1-NEXT: ldr r1, [r1] ; THUMB1-NEXT: ldr r1, [r1] ; THUMB1-NEXT: cmp r1, r0 @@ -83,7 +87,11 @@ define i32 @test1() #0 { ; THUMB1-NEXT: .p2align 2 ; THUMB1-NEXT: @ %bb.3: ; THUMB1-NEXT: .LCPI0_0: -; THUMB1-NEXT: .long __stack_chk_guard +; THUMB1-NEXT: .Ltmp0: +; THUMB1-NEXT: .long __stack_chk_guard(GOT_PREL)-((.LPC0_0+4)-.Ltmp0) +; THUMB1-NEXT: .LCPI0_1: +; THUMB1-NEXT: .Ltmp1: +; THUMB1-NEXT: .long __stack_chk_guard(GOT_PREL)-((.LPC0_1+4)-.Ltmp1) ; ; THUMB1-PIC-LABEL: test1: ; THUMB1-PIC: @ %bb.0: @@ -136,16 +144,18 @@ define i32 @test1() #0 { ; THUMB2-NEXT: push {r7, lr} ; THUMB2-NEXT: .pad #1032 ; THUMB2-NEXT: sub.w sp, sp, #1032 -; THUMB2-NEXT: movw r0, :lower16:__stack_chk_guard -; THUMB2-NEXT: movt r0, :upper16:__stack_chk_guard +; THUMB2-NEXT: ldr r0, .LCPI0_0 +; THUMB2-NEXT: .LPC0_0: +; THUMB2-NEXT: add r0, pc ; THUMB2-NEXT: ldr r0, [r0] ; THUMB2-NEXT: ldr r0, [r0] ; THUMB2-NEXT: str.w r0, [sp, #1028] ; THUMB2-NEXT: add r0, sp, #4 ; THUMB2-NEXT: bl foo -; THUMB2-NEXT: movw r1, :lower16:__stack_chk_guard ; THUMB2-NEXT: ldr.w r0, [sp, #1028] -; THUMB2-NEXT: movt r1, :upper16:__stack_chk_guard +; THUMB2-NEXT: ldr r1, .LCPI0_1 +; THUMB2-NEXT: .LPC0_1: +; THUMB2-NEXT: add r1, pc ; THUMB2-NEXT: ldr r1, [r1] ; THUMB2-NEXT: ldr r1, [r1] ; THUMB2-NEXT: cmp r1, r0 @@ -155,6 +165,14 @@ define i32 @test1() #0 { ; THUMB2-NEXT: popeq {r7, pc} ; THUMB2-NEXT: .LBB0_1: ; THUMB2-NEXT: bl __stack_chk_fail +; THUMB2-NEXT: .p2align 2 +; THUMB2-NEXT: @ %bb.2: +; THUMB2-NEXT: .LCPI0_0: +; THUMB2-NEXT: .Ltmp0: +; THUMB2-NEXT: .long __stack_chk_guard(GOT_PREL)-((.LPC0_0+4)-.Ltmp0) +; THUMB2-NEXT: .LCPI0_1: +; THUMB2-NEXT: .Ltmp1: +; THUMB2-NEXT: .long __stack_chk_guard(GOT_PREL)-((.LPC0_1+4)-.Ltmp1) ; ; THUMB2-PIC-LABEL: test1: ; THUMB2-PIC: @ %bb.0: _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits