jasonmolenda added a comment.

I added a Mach-O LC_NOTE which allows us to encode the number of bits used in 
addressing:

(I really need to create a docs/lc-notes.md to document these)

"addrable bits" LC_NOTE

"addrable bits" (number of bits used for addressing) data payload is a 
structure:
struct addressing_bit_count 
{

  uint32_t version;             // currently 2
  uint32_t addressing_bits;     // # of bits used for addressing in this 
corefile's code, 0 if unknown
  uint32_t addressing_bits_el0; // # of bits used for addressing in EL0 code on 
this machine, 0 if unknown
  uint32_t addressing_bits_el1; // # of bits used for addressing in EL1 code on 
this machine, 0 if unknown

};
This LC_NOTE command specifies how many bits in pointers are actually used for 
addressing. The bits above these may be used for additional information (tagged 
pointers, pointer authentication bits), and the debugger may need to enforce an 
all-0 or all-1 clearing of these bits when computing what the pointers are 
pointing to.
This load command uses the convention of using Aarch64's TCR_EL0.T0SZ and 
TCR_EL1.T0SZ register values. The T0SZ values are the number of bits NOT used 
for addressing. For arm64, you compute the # of addressing bits by the formula 
64 - TCR_ELx.T0SZ. For instance, a T0SZ value of 25 means (64 - 25 == 39) 39 
addressing bits are in use. Bits 63..39 are used for pointer authentication, 
38..0 is used for addressing.
A target device may have a different number of bits for different execution 
levels; for now this LC_NOTE only allows EL0 (typically user land processes on 
darwin systems) and EL1 (typically xnu kernel on darwin systems) values to be 
provided. We may add higher execution level T0SZ's in the future.
If the corefile producer knows the correct execution level for the code in the 
corefile, it can provide this directly in addressing_bits. Otherwise, it can 
provide addressing_bits_el0 and/or addressing_bits_el1 and the corefile 
consumer (lldb) will choose the most appropriate value to use, if available, 
for the corefile.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98529/new/

https://reviews.llvm.org/D98529

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